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Hello,
I'm trying to measure the consumption of the pin component in PSoC5LP.
I want to evaluate it in terms of sourcing and sinking current.
Therefore I decided to go thru all the different modes available for all different pin configs (analog, digital in/out/inout).
So I wanted to ask before proceeding : are all the modes suited for sinking AND sourcing, or are there modes that are better used to source/sink?
For example, I'm kind of convinced that Strong Drive is good for sourcing current, but not so good at sinking. Is that true?
As for the test plan :
For pins that are sourcing, I thought of sourcing the current into a passive load (around 5.6kOhms; about the same value as the pull resistances, and around 20 pF capacitance in parrallel). I'm not so good at designing circuits. Is this ok?
For pins that are sinking, I thought of sourcing current from an op-amp wired as a follower (for DC) and as an oscillator which outputs a sine and square wave (for AC). Again, I'm not so good at designing circuits. Is this ok?
Thanks,
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PSoC 5LP
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Generally speaking one tests a pin by forcing a current into/out of (sink/source)
the pin and measuring its V drain to source, Vol in the case of sink, Voh in the
case of source.
So thats done with a current source or sink, which generally speaking is external,
not done with IDAC in PSOC as it cannot genberate enough current for a meaningful
measurement. Classic external circuits look like (ignore in source R2 and the PNP it
is connected to, you dont need that) -
Can you describe why you are doing this ?
Regards, Dana.
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Hello,
It's to measure the consumption of the PSoC when we load an external circuit onto its pin.
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For example, I'm kind of convinced that Strong Drive is good for sourcing current, but not so good at sinking. Is that true?
For all GPIO, source and sink, strong best for both source/sink. Except the SIO pin is exception and has 25 mA of sink capability. But analog pin rated higher source/sink when driven by OpAmp, OpAmp has to be operated at high power sertting.
For pins that are sourcing, I thought of sourcing the current into a passive load (around 5.6kOhms; about the same value as the pull resistances, and around 20 pF capacitance in parrallel). I'm not so good at designing circuits. Is this ok?
Yes, you can do this, then compute, based on Voh, what actual load is. Not sure why the cap needed ?
For pins that are sinking, I thought of sourcing current from an op-amp wired as a follower (for DC) and as an oscillator which outputs a sine and square wave (for AC). Again, I'm not so good at designing circuits. Is this ok ?
OpAmp can source/sink more current to an analog pin, but in sink case its Vol will be > than a strong output for currents < 8 ma for general GPIO, < 25 mA for SIO pin.
Regards, Dana.
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Actually I am not sure I can say below as specs not complete enough regarding OpAmp
output at lower current levels Iol and Ioh that max specs.
For pins that are sinking, I thought of sourcing current from an op-amp wired as a follower (for DC) and as an oscillator which outputs a sine and square wave (for AC). Again, I'm not so good at designing circuits. Is this ok ?
"OpAmp can source/sink more current to an analog pin, but in sink case its Vol will be > than a strong output for currents < 8 ma for general GPIO, < 25 mA for SIO pin."
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Hello again,
I've stumbled upon something in the TRM about overvoltage protection for pins.
19.3.14 Overvoltage Tolerance
All I/O pins provide an overvoltage (Vddio < Vin < Vdda) tolerance
feature at any operating voltage. Limitations include
the following:
...
■ GPIO pins must be limited to 100 μA, using a current
limiting resistor. Outside the current limitation, GPIO pins
clamp the pin voltage to approximately one diode above
the Vddio supply.
I just wanted to know what the paragraph in bold is telling.
Is it the maximum current draw for a GPIO pin? Kinda contradictory since it should be 8mA.
It might also explain, if it is true, why my oscillator does not work when I plug it into the GPIO pin.
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The 100µA limit is for the OVERVoltage and not for the "normal" use. More than 100µA @ Vddio < Vin < Vdda would destroy the pin / chip due to clamping. What exactly (Pin drive-mode, current, voltage) is the problem when connecting to your scope?
Bob
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I think I just got the answer from your post.
The circuit was oscillating at 2.5V and the PSoC's VDDIO & VDDA was only 2.0V.
My bad