Expanding bootloader memory size

[Anonymous]

[WICED-SDK-2.2.1]

Is there a way to expand the bootloader memory size from what is default in the SDK?

[Anonymous]

The bootloader is located in the first 16kB of flash.The maximum size of the bootloader (and other non-divisible software components) is somewhat governed by the sector size of flash memory in the MCU.The flash memory map for STM32F2xx is shown in Section 2.3.3 of the STM32F2xx Reference ManualFor STM32F2xx platforms, the WICED memory map is shown in the following code snippet.(from <WICED-SDK-2.2.1>/Wiced/Platform/common/ARM_Cortex_M3/STM32F2xx/GCC/bootloader_link.ld)

MEMORY{    BTLDR_VECTORS    (rx)  : ORIGIN = 0x08000000, LENGTH = 512    BTLDR_API        (rx)  : ORIGIN = 0x08000200, LENGTH = 512    BTLDR_CODE       (rx)  : ORIGIN = 0x08000400, LENGTH = 15K    DCT1_FLASH       (rx)  : ORIGIN = 0x08004000, LENGTH = 16K    DCT2_FLASH       (rx)  : ORIGIN = 0x08008000, LENGTH = 16K    APP_HDR          (rx)  : ORIGIN = 0x0800C000, LENGTH = 512    APP_CODE         (rx)  : ORIGIN = 0x0800C200, LENGTH = 0xF3E00  /* 975.5K */    SRAM             (rwx) : ORIGIN = 0x20000000, LENGTH = 128K}

[Anonymous]

If you want to provide more room for the bootloader, you will also need to relocate other memory components accordingly.This includes the location of the DCT.For STM32F2xx, the changes need to be made here:<WICED-SDK-2.2.1>/Wiced/Platform/common/ARM_Cortex_M3/STM32F2xx/stm32f2xx_platform.cThe relevant definitions that may need updating are copied below for reference

#define APP_HDR_START_ADDR   ((uint32_t)&app_hdr_start_addr_loc)#define DCT1_START_ADDR  ((uint32_t)&dct1_start_addr_loc)#define DCT1_SIZE        ((uint32_t)&dct1_size_loc)#define DCT2_START_ADDR  ((uint32_t)&dct2_start_addr_loc)#define DCT2_SIZE        ((uint32_t)&dct2_size_loc)#define SRAM_START_ADDR  ((uint32_t)&sram_start_addr_loc)#define SRAM_SIZE        ((uint32_t)&sram_size_loc)#define PLATFORM_DCT_COPY1_START_SECTOR      ( FLASH_Sector_1  )#define PLATFORM_DCT_COPY1_START_ADDRESS     ( DCT1_START_ADDR )#define PLATFORM_DCT_COPY1_END_SECTOR        ( FLASH_Sector_1 )#define PLATFORM_DCT_COPY1_END_ADDRESS       ( DCT1_START_ADDR + DCT1_SIZE )#define PLATFORM_DCT_COPY2_START_SECTOR      ( FLASH_Sector_2  )#define PLATFORM_DCT_COPY2_START_ADDRESS     ( DCT2_START_ADDR )#define PLATFORM_DCT_COPY2_END_SECTOR        ( FLASH_Sector_2 )#define PLATFORM_DCT_COPY2_END_ADDRESS       ( DCT1_START_ADDR + DCT1_SIZE )#define ERASE_DCT_1()              platform_erase_flash(PLATFORM_DCT_COPY1_START_SECTOR, PLATFORM_DCT_COPY1_END_SECTOR)#define ERASE_DCT_2()              platform_erase_flash(PLATFORM_DCT_COPY2_START_SECTOR, PLATFORM_DCT_COPY2_END_SECTOR)

[Anonymous]

You will also need to change the link script for the App.It should be changed similarly to the bootloader link scriptThis is located in <WICED-SDK-2.2.1>/Wiced/Platform/common/ARM_Cortex_M3/STM32F2xx/GCC/bootapp_link.ldEnsure that the following boundaries are on Flash Sector boundaries:* Bootloader - DCT1* DCT1 - DCT2* DCT2 - App

[Anonymous]

Will the 4390 have the same embedded flash organization and features?

[Anonymous]

Will the 4390 have the same embedded flash organization and features?

No - The 4390 does not have internal flash.  Programs, DCT and resources are all loaded from an external serial flash chip. The features will stay fairly similar to the STM32 based platforms, the organisation is fairly different however.