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Hi,
From the application mode of "Programming EZ-USB® FX3™ Processor Port as Synchronous Slave FIFO", 32 Bit data bus width is not supported if SPI is selected. After bootup, I use SPI (GPIO[53] - SPI_SCK and GPIO[56] - SPI_MOSI) to configure FPGA, then I enable GPFI to 32-bit slave FIFO mode, it is obviously doable. During firmware runtime, I want to re-configure FPGA with SPI interface again, but at that monent, GPIF is 32-bit slave FIFO mode, Can I stop GPIF or switch to 16-bit mode, using SPI re-configure FPGA, and swtich to 32-bit slave FIFO again?
Thank you!
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Hi Yi,
Take care on this post
http://www.cypress.com/?app=forum&id=167&rID=58084
And on this post
http://www.cypress.com/?app=forum&id=167&rID=60662
Then it should work in all directions.
Regards
Lumpi