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Hi,
I am trying to understand if it is possible to configure an FPGA using GPIF II (32-bit slave selectMAP) which requires the GPIF be configured as Master mode. Then switch GPIF to slave FIFO mode. I am wondering if you have an example.
Based on my understanding, in my case I cannot have disjoint state machines because one is master and one is slave. So, if I define two separate GPIF II projects, how I should configure the chip after completing the FPGA configuration? At the moment when I load a firmware to cypress, I cannot load any other firmware until a power down then up happens.
Also, I need to have an enable/disable signal along with the data path to implement a non-continuous FPGA configuration. If I choose any available GPIO, will it be synchronze with the data (for instance, it will be working with PCLK = 80MHz rate)?
Thanks,
Nazila
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Hi Nazila!
you can and have to reload the GPIF II designs just use see post disable and load function gpif functions.
http://www.cypress.com/?app=forum&id=167&rID=60662
You also can choose a better configuration for more GPIF designs at the designer, see post... Then you do not have to rename the configuratin structures all the time.
http://www.cypress.com/?app=forum&id=167&rID=60039
For enable and disable use one of the 32 bit data lines if you just need 16-bit data for fpga configuration.
Hope this helps out.
Regards
Lumpi