Anonymous
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May 11, 2009
01:11 PM
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May 11, 2009
01:11 PM
Hi,
I'm currently working on a Analog Devices Blackfin interfacing with a CYRF6936. I've written the driver to mimic the WirelessUSB LP Driver 1.4 for Cypress PSoCs as closely as possible, but it's unstable. After several seconds of transmitting and receiving, the RXBERR IRQ is asserted, and I can't get it to de-assert. Reading the TX and RX IRQ_STATUS registers doesn't seem to clear it, so my interrupt keeps on firing continuously. The datasheet says "this flag is cleared when RX GO is set and a SOP is received," but this is happening during a period of transmission, and the other end isn't going to be transmitting anything because it's waiting for a packet.
How do I get RXBERR IRQ to de-assert so my ISR stops firing?
I'm currently working on a Analog Devices Blackfin interfacing with a CYRF6936. I've written the driver to mimic the WirelessUSB LP Driver 1.4 for Cypress PSoCs as closely as possible, but it's unstable. After several seconds of transmitting and receiving, the RXBERR IRQ is asserted, and I can't get it to de-assert. Reading the TX and RX IRQ_STATUS registers doesn't seem to clear it, so my interrupt keeps on firing continuously. The datasheet says "this flag is cleared when RX GO is set and a SOP is received," but this is happening during a period of transmission, and the other end isn't going to be transmitting anything because it's waiting for a packet.
How do I get RXBERR IRQ to de-assert so my ISR stops firing?
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3 Replies
Anonymous
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May 12, 2009
03:55 PM
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May 12, 2009
03:55 PM
try not enabling this interrupt to be present on IRQ pin, rather just examine by reading status register if/when necessary
Anonymous
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Aug 06, 2009
09:28 AM
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Aug 06, 2009
09:28 AM
Receive Buffer Error Interrupt Status. This IRQ is triggered in one of two ways: (1) When the receive buffer is empty and there
is an attempt to read data (2) When the receive buffer is full and more data is received; this flag is cleared when RX GO is set
and a SOP is received. These are the only ways by which this register gets set. This is a read only register. You will not be able to write to this register. Once you read it gets cleared
Regards,
Anitha
Aug 06, 2009
10:29 AM
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Aug 06, 2009
10:29 AM
Anitha,
You are right .This are the only two ways where you can expect an interrupt and get the RXBERR IRQ bit set.
Regards,
Sai
You are right .This are the only two ways where you can expect an interrupt and get the RXBERR IRQ bit set.
Regards,
Sai