3 Replies Latest reply on Nov 24, 2014 11:48 AM by vikasv_56

    [FX2] Generate OUT packet by CPU

    content.librarian
    content.librarian Nov 24, 2014 11:48 AM

      Hi,

         

       

         

      I currently use my FX2 chip in slave FIFO mode (EP2 Auto-Out).

         

      Is there any way to generate an additional packet by the CPU and insert it into the FIFO OUT stream?

         

       

         

      Thank you for your support!

         

       

         

      Kind regards,

         

      Peter

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        • 1. Re: [FX2] Generate OUT packet by CPU
          vikasv_56
          vikasv_56 Nov 14, 2014 11:09 PM (in response to content.librarian)

           Hi ,

             

           

             

          You can source the data to the OUT endpoint.In order to anable the CPU to source the data you have to set the bit 0 (ENH_PKT) of register REVCTL.Then you can edit/source the data .

             

           

             

          Before editing or sourcing the data you have switch to manual mode

             

           

             

          Regards,

             

          Vikas.

          • 2. Re: [FX2] Generate OUT packet by CPU
            content.librarian
            content.librarian Nov 24, 2014 8:55 AM (in response to content.librarian)

            Hi Viskas

               

            Thank you for your reply. Unfortunately, it didn't work out yet.

               

            My code to source a new packet:

               

                while(!(EP24FIFOFLGS & (1 << 1))) {
                    SYNCDELAY;
                }
                FIFORESET = 0x80; // NAK all
                SYNCDELAY;
                FIFORESET = 0x82;
                SYNCDELAY;
                
                EP2FIFOBUF[0] = 0xAA;
                EP2FIFOBUF[1] = 0xBB;
                EP2FIFOBUF[2] = 0xCC;
                EP2FIFOBUF[3] = 0xDD;
                SYNCDELAY;
                
                EP2BCH = 0;
                SYNCDELAY;
                EP2BCL = 4;
                SYNCDELAY;
                OUTPKTEND = 0x82; // skip last packet
                SYNCDELAY;
                FIFORESET = 0x00; // release NAK
                SYNCDELAY;

               

            EP2 is configured as OUT, Bulk, Double Buffered and REVCTL = 0x03.

               

            Thank you for your support!

               

            Kind regards,
            Peter

            • 3. Re: [FX2] Generate OUT packet by CPU
              vikasv_56
              vikasv_56 Nov 24, 2014 11:48 AM (in response to content.librarian)

               Hi 

                 

               

                 

              Can you please attach your entire project?

                 

               

                 

              Is the CPU executing the the code to source the data? or is  it getting stuck in the while loop?Please check this one.

                 

               

                 

              Regards,

                 

              Vikas