SGPIO Target in PSoC 4

Maybe you should mention that this component is about connecting SATA devices to the PSoC... (not everybody knows what SGPIO means)

The standard appears to be more than just SATA solutions -

http://en.wikipedia.org/wiki/SGPIO

Regards, Dana.

Here is the standard -

ftp://ftp.seagate.com/sff/SFF-8485.PDF

Hli, seems like 2.5" drives in general was motive for standard, and

of course SATA drives took over the 2.5" market. SAS was also

a motive for strandard.

http://www.webopedia.com/DidYouKnow/Computer_Science/2007/sas_sata.asp

Regards, Dana.

Is there a SEP module Supporting some of the SES commands available for the PSOC?

 Can you please provide more details of SEP Module and SCS commands? Also, please explain your requirement in detail.

Hi  asha;

this SGPIO code can not support 24 clocks of one data cycle, How to modify this component, let it support 24 clk。

thank you very much

Hi,

You can refer to the attached SGPIO component. This new version can support up 24 bits per frame.

To import the component to PSoC Creator, please refer to this video:

http://www.cypress.com/resource-types/video/psoc-creator-tutorial-importing-components

Hi rlos；

Does this component can support 12 clk and 24 clk at the same time? thank you

Hi rlos；

I can not create 2 instances with this component in a project, but I can create 2 instances with SGPIO_Target_PSoC4.zip.

my psoc device is CY8C4246AZI-M445

Hi rlos；

I do not need Vendor Specific info. just want to get the sdataout data. the data is 12 clks or 24 clks.

Hi,

This component can support 12 clks or/and 24 clks. If you need to dynamically change the number of clks supported, use the SetSGPIOFrameSize() function.

In order to support 24 clks, the component requires 3 UDBs. That means you can only place one instance in the PSoC 4M part.

You could remove the Vendor Specific info to save a few resources, but it will still require 3 UDBs.

tx and rx FIFO buffer is not need 4x datas, or do not need tx FIFO，this can reduce one udb？

Useing SetSGPIOFrameSize to set the clk is not practical， because PSOC do not know in advance the data length.

So I think the Frame need to be set 24 clk, if the practical data is 12 clk, and the ReadRxData return 12 valid clk data, and 12 invalid data(0).

So this SGPIO component need a function GetSGPIOFrameSize to get current data length.

Hi,

Removing the TX FIFO support will not decrease the number of UDBs. It only reduces the number of PLD logic, but we still need at least 3 datapath to support 24 clks, which consumes 3 UDBs.

You could use a timer or a counter externally to the component to count the number of clocks between two consecutive rising edge of SLOAD. Once you find out that, you can call SetSGPIOFrameSize() and enable the SGPIO component.