In an attempt to have a host processor upload code to a CY8C22545, I'm running into a problem.
First,
I'm using the default bootloader key of 01234567.
I'm specifying Boot_Packet_Size16 ( Boot_Packet_Size78, incedentally, doesn't even compile ... which does little to instill confidence
).
I'm specifying and using an I2C speed of 100K. 50K makes no difference.
I'm using BootLdrI2c_ver 0x1000
NOTE: The device under this version works just fine at run time.
Then ...
To begin the upload session, I send the following I2C data: ( in Hex )
0C, 06, 0A, FF, 38, 00, 01, 02, 03, 04, 05, 06, 07 ... where the 0C is my defined bootloader I2C address, and the 06 0A is the I2C prefix (which shouldn't matter).
A subsequent I2C status read from the device after sending the above data returns the expected 20h. Great !!! ... it's accepting entry into boot mode.
Then, to begin the first download record I attempt to send the following partial block write sequence ...
0C, 06, 10, FF, 39, 00, 01, 02, 03, 04, 05, 06, 07, 00, 26, 40, 40, 40, 40
... but, my I2C transmitter gets a NAK after sending the 14th byte ( the 26 in the above data ), and of course I don't even bother reading the status.
What's going on here? Inspection of the PSoC bootloader assembly source code shows that it allocates a 19 byte buffer when specifying Boot_Packet_Size16 and as such I'd think it should receive the above data just fine.
Am I doing something wrong or missing something ?
First,
I'm using the default bootloader key of 01234567.
I'm specifying Boot_Packet_Size16 ( Boot_Packet_Size78, incedentally, doesn't even compile ... which does little to instill confidence
). I'm specifying and using an I2C speed of 100K. 50K makes no difference.
I'm using BootLdrI2c_ver 0x1000
NOTE: The device under this version works just fine at run time.
Then ...
To begin the upload session, I send the following I2C data: ( in Hex )
0C, 06, 0A, FF, 38, 00, 01, 02, 03, 04, 05, 06, 07 ... where the 0C is my defined bootloader I2C address, and the 06 0A is the I2C prefix (which shouldn't matter).
A subsequent I2C status read from the device after sending the above data returns the expected 20h. Great !!! ... it's accepting entry into boot mode.
Then, to begin the first download record I attempt to send the following partial block write sequence ...
0C, 06, 10, FF, 39, 00, 01, 02, 03, 04, 05, 06, 07, 00, 26, 40, 40, 40, 40
... but, my I2C transmitter gets a NAK after sending the 14th byte ( the 26 in the above data ), and of course I don't even bother reading the status.
What's going on here? Inspection of the PSoC bootloader assembly source code shows that it allocates a 19 byte buffer when specifying Boot_Packet_Size16 and as such I'd think it should receive the above data just fine.
Am I doing something wrong or missing something ?
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