Hi, for my design, I'm trying to use the cool slick PrISM component to add 1 bit of dither to a DAC, so I need to put in DAC bus mode. However, when I do so, I get these errors (one per input)
Multiple signals found between VIDACs on data input 0
I'm using two other DAC's which I tried hooking up to the same bus, but I still get it. I'm also using the CapSense_CSD component, which looks like it also uses some DAC's.
So, is there a way to do this somehow?
Thanks for any help!
-Michael
