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Hello,
I have a PSOC which model name is CY8C24123A-24SXI and I am using PGA module. Here is the problem ; there are 5 same circuits and all have same input,gain,code but their output voltage are different each other.
Port Config.
P0(4) ----> Input (180 mV)
P0(3)----->Output (Between 450 mV - 600mV)
Gain : 5.3
All PSOC have same code and here is the code for configuration :
///////////////////////////////////////////
PGA_1_SetPower(PGA_1_HIGHPOWER);
PGA_1_SetGain(PGA_1_G8_00);
PGA_1_Start(PGA_1_HIGHPOWER);
AMUX8_InputSelect(AMUX8_PORT0_4);
AMUX8_Start();
LPF2_Start(LPF2_HIGHPOWER);
LPF2_SetPower(LPF2_HIGHPOWER);
LPF2_SetCA(LPF2_FEEDBACK_32);
LPF2_SetCB(LPF2_FEEDBACK_32);
LPF2_SetC1(1);
LPF2_SetC2(1);
LPF2_SetC3(2);
LPF2_SetC4(31);
LPF2_SetPolarity(LPF2_POLARITY_NON_INVERTING);
ARF_CR = (ARF_CR & ~0x07)|DEF_AGND;//analog module on
////////////////////////////////////////////////////////////
And I also attached block configuration as a print screen of my project.Could you help me about this issue ? I am looking forward your answer.
Best Regards.
Salih KAYA
Solved! Go to Solution.
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I see two problems from your screenshot.
1. You are starting the PGA with high power, but the analog power setting in the global resources is SC On/Ref Low. With the reference power set low, the reference will not be able to supply the power demand of the PGA. So, set the analog power to SC On/Ref High.
2. The column clock to the LPF is VC1 whose frequency is 8MHz. Check the column clock requirement specified in the filter wizard and set the column clock accordingly.
Also, the output you are seeing is from the LPF not from the PGA. So, my guess is that the problem is because of the LPF. To confirm that the PGA is working fine, enable the analog buffer on P0[5] and measure the output on P0[5].
Best Regards,
Ganesh
The PSoC Hacker
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Hi, thanks for your reply.
1- I checked PGA as you say and it works fine. But I must use with LPF.
2- I couldn't set LPF VC1's frequency to 8 Mhz from wizard.
Can you help about these settings ? I have attached whole project file.
Here what I want to do ;
Signal Input (low frequency : nearly 10 Khz) --> Port_0_4 --> PGA(Gain : 5.33 ) ---> LPF ---> Port_0_3(Singal output)
There is a something I missed and I can't solve problem. Your help is very appreciated.
Best Regards,
Salih KAYA
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I am sorry, I can't attach file and edit my post . There is a problem about attaching rar files. Here the project file with zip format.
Best Regards,
Salih KAYA