3 questions about 68013

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Anonymous
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        three questions 1,it's well konwn that CY7C68013's endpoint 2/4/6/8 can be configured to double/triple/quad,and it also can be 8/16 bits.So what's the physical size of the FIFO buffer? When one of the endpoints is configured to be triple or quad,does some endpoints have no physical buffer?So can you tell me what are the effects on other endpoints when one is configured to be triple/quad? 2,Are all the 2/4/6/8 endpoint FIFO buffer are physically 16bits wide? if not so,when some endponts are configured to be 16bits wide,other endpoints would be influeced? 3,Maybe all the 2/4/6/8 endpoint FIFO buffers are 8bits wide,configuring to 16 bits wide just makes the cy7c68013's FD pins be 16 bits,which is convenient to connect to external controller(DSP,ARM).so how to do when firmware has many datum greater than 255 to transmit.can firmware write a int data into FIFO buffer?I have done it in my firmware and the compiling didn't generate any error,but the transfer failed and I don't konw which code segment is wrong.   
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Anonymous
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Ian,

   

The FIFO is 4k in size.

   

There are only 12 valid endpoint buffer (FIFO) configuration, please look at section 1.17 EZ-USB Endpoint Buffers in the TRM for more details.

   

8/16 bit width is the configuration of data width you want on the GPIF/Slave FIFO interface. It has nothing to do with the FIFO or the way the data is placed inside the FIFO.

   

Please read through GPIF and Slave FIFO chapters of the TRM to understand how the interface works. The 16/8 lines are data lines. The interface have other signals and the data lines are used for only data. So you can send or receive more than 255 bytes.

   

-Anand

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Anonymous
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        so when a external contoller write a 16 bits wide data on the FD,the fifo buffer is load 2 datum,is it so?   
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Anonymous
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Yep. 16 bits = 2 bytes.

   

Regards,

   

Anand

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