If the requirement is to update VDAC1 and VDAC2 upon rising edge on drq, then it is easier to use two independent DMA Channels with a single TD each.
Each TD has a fixed source and destination. The drq of two DMA Channels can be connected to a single clock.
Configure the Request per Burst to 1 and Burst Count to 1. This will transmit 1 byte for every rising edge of the clock to drq.
The TD can be chained to itself.
You can refer to Code example available here
This example demonstrates updating of one VDAC using a single DMA channel. Another similar DMA channel can be used to update the second VDAC.
Thank you for help, i was trying to minimize number of DMA chanels.
I need 26 of them.
if some one need a guide how to make 6 ++ DAC`s insted of 2 (3446-AXI) I`ll be glad to help.