PSoC 3 - Programming Connections/Pins

[Anonymous]

Hello All,

   

I am in the process of making a board using the PSoC 3 chip.

   

I was using the schematics of the CY8CKIT-030 as a reference. In that design, there is a 10 pin header. My questions are as follows:

   

1) What are the connections needed for the chip to program & debug? In the reference schematic, they have:

   

p10 - SWDIO

   

p11 - SWDCK

   

p13 - SWO

   

p14 - TDI

   

These seem to be JTAG. I though miniprog 3 could do SWV/SWD which only required 2 pins? Please clarify.

   

2) Where can I find the female header to put on the board? I looked at Digikey, and they seem to be out of stock.

   

3) What should I do with the USB pins if I choose not to use them?

   

Thanks,

   

Alex

[Anonymous · Accepted solution]

For programming and debugging PSoC3 using SWD, following are the connections required between Miniprog3 and PSoC3 chip:

   

    
1. SWDIO (P1[0])
    
2. SWDCK (P1[1])
    
3. XRES     - Reset
    
4. VTARG  - Target Voltage(VTARG of Miniprog3 should be connected to VDDIO1 of PSoC3) - The SWDIO and SWDCK Pins are on the voltage quadrant corresponding to VDDIO1
    
5. GND
   

   

For Programming and debugging via JTAG(4 wire):

   

    
1. TMS P1[0]
    
2. TCK P1[1]
    
3. TDO P1[3]
    
4. TDI   P1[4] 
   

       

For Programming and debugging via JTAG(5 wire):

           

    
1. TMS P1[0]
    
2. TCK P1[1]
    
3. TDO P1[3]
    
4. TDI   P1[4] 
    
5. NTRST  P1[5]
   

   

If you do not intend to use USB in your application, the USBIO pins P15[6] and P15[7] can be used as GPIOs.

[Anonymous]

Thanks for the quick reply.

   

Is there a preferred method? I was thinking that the SWD/SWV method has a lower pin count and therefore might be more desirable. However, is there a debugging time cost to this (do data transfers/programming take longer)?

   

Thanks,

   

Alex

[VivekK_11]

If you do not require JTAG specific features like Boundry scan, JTAG chain programming, SWD is the recommended debug interface option. SWD is the debug interface from ARM intended to replace JTAG with lower pin count and no loss of performance or features.

[Anonymous]

SWD is the preferred interface for Programming and debugging. With PSoC3 SWD is a more Robust interface. Interms of timing, both the interface should take the sametime as long as the operating frequency is the same.

[Anonymous]

Hi 

       

I need a help in designing a 32 channel data acquisition system 

[BeCo_289361]

U2's first illustration shows the SWD setup for miniprog3.  

   

Can this configuration be used for capsense tuning as well?  

   

Or are seperate pins need for I2C?

   

I connected P1[0,1] to P12[1,0] respectively on my target (no pull-ups).  The tuner freezes quite a bit and the trouble seems to be I2C related.

   

Any ideas?

   

Thank you.

   

Bernie 

[BeCo_289361]

Please disregard previous post.

   

bc