3 Replies Latest reply on Apr 25, 2012 4:02 AM by zhli_282171

    FX3 slavefifo mode -SynchronousSlave FIFO Write Sequence question



      I read the notebook of AN65974.pdf. when i read the part of Synchronous Write Cycle Timing on page of 9 and 10, i find that "3cycle latency from SLWR#to FLAG" on the timing. But i cann't understand the meaning of the latency?  anyone could help me?