[68013A]Why missing some bits in a bluk?

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Anonymous
Not applicable
    I just want to use the “slave-fifo” mode to connect PC and FPGA.   
   
    But when i get data from Cy68013A to FPGA , it works not well.   
   
        
   
    i use 512-bytes X 4 in EP2 ,out  ( i have tried to use 1024-bytes X 2 mode,but it can’t work ) , and get a 1024-bytes bulk every turn.   
   
        
   
    Every turn i get it will miss some bits , probably one or two or three...and it will get some data from next bulk.   
   
        
   
    And...even though it transfer successful in frist turn , next turn the XferData aslo probably return "false".   
   
        
   
    thank.      
   
    
          
    
     Sky.    
    
          
    
     begin:    
    
          
    
          
    
     end:    
    
          
    
          
    
     fpga:    
    
          
    
          
    

 

    

   
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10 Replies
Anonymous
Not applicable

 Hi 

   

Even if you configure buffer as 1024bytes, it can receive only 512Bytes. Please refer the link http://www.cypress.com/?id=4&rID=31675.

   

 

   

As you have programmed the IFCLK as external clock please make sure that there is clock at the FX2LP IFCLK pin before it is configured.

   

 

   

Are you receiving the same number of Bytes in FPGA as you are sending from PC?

   

 

   

Regards,

   

Vikas.

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Anonymous
Not applicable

Hi.

   

Vikas.

   

Thanks for your answer.

   

 

   

Last question has been sloved ...but there is a new one...

   

I want to get a "Ack" signal after every bulk to prevent  data jamming , but it can not work

   

 

   

Does this wave mean that I have transfer two bytes to EP6?

   

I coundn't get any data from EP6 by "XferData".

   

It just return false.

   

   

 

   

My Frameware:

   

FIFOPINPOLAR = 0xFF;

   

EP2CFG = 0xA2;               
EP6CFG = 0xE1;           
EP2FIFOCFG = 0x15;     
EP6FIFOCFG = 0x0D; 

   

 

   

EPXAUTOLENL/H has no confing.

   

 

   

Regards,

   

Sky.

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Anonymous
Not applicable

 Hi 

   

 

   

EP6CFG=0xE1;

   

 

   

the first two bytes are used to indicate the buffering type. 01 is the invalid type. Please correct it.

   

FIFOPOLAR=0xFF: you have configured all the signals (mentioned in FIFOPINPOLAR register ) as active HIGH. So when you want to write data into FX2LP, you have to assert SLWR (i.e 1). (it has to be high when you are writing the data to buffer)

   

Please configure EPxAUTOINLENH/L registers with some non -zero value.

   

before reading the data from endpoint EP6 try to read the register EP2468STAT to check the status of EP6.So that you will know whether there is any data in the endpoint or not. To know the exact number of bytes read the registers EP6BCH/L

   

 

   

Regards,

   

Vikas

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Anonymous
Not applicable

Thanks

   

VAVC

   

 

   

I use all control-signals as avtive high , no problem

   

Now i have more errors...

   

When I just transfer...it can't work

   

It looks like the 68013 can't receive data from PC

   

I can't understand ...

   

 

   

My C# Code:

   

                   Success = Usb_Mine.Trans(1024, Trans_Buffer);

                    if (Success)
                    {
                        Trans_Ack = Usb_Mine.Collect(1024, Trans_Buffer);
                        if (!Trans_Ack)
                        {
                            i --;
                            Usb_Mine.Down_Fw("slave.hex");
                            Usb_Mine.ReConnect();
                            Usb_Mine.Reset();
                           
                        }
                        else
                        {
                            Trans_No ++;
                        }
                    }
                    else
                    {
                        i--;
                        Usb_Mine.Down_Fw("slave.hex");
                        Usb_Mine.ReConnect();
                        Usb_Mine.Reset();
                    }

   

---------------------------------------------------------------------------

   

  public bool Trans(int len, byte[] data)
        {
            bool Success = true;
            Success = MyOutPoint.XferData(ref data, ref len);
            if (!Success)
            {
                MyOutPoint.Reset();
                //uint Lastf = MyOutPoint.LastError;
            }
            return Success;
        }

        public bool Collect(int len, byte[] data)
        {
            bool Success;
            Success = MyInPoint.XferData(ref data, ref len);
            return Success;
        }

   

 

   

 

   

How can i read the register EP2468STAT? Using API?

   

 

   

Regards,

   

Sky.

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Anonymous
Not applicable

 Hi 

   

Please try changing the number of bytes from 1024 to 512.

   

 

   

Try sending and reading the data from the Control Centre or CYconsole. (you can get these host applications once if you install the cy3684 http://www.cypress.com/?rID=14321)

   

 

   

For reading the EP2468STAT register send some vendor command to read the contents of register

   

code should be as follows in the vendor command

   

EP0BUF[0]=EP2468STAT;

   

EP0BCH=0x00;

   

EP0BCL=0x01;

   

 

   

Please go through the app note An61345 http://www.cypress.com/?rID=43046.

   

 

   

Regards,

   

Vikas.

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Anonymous
Not applicable

Hi

   

 

   

I have tried to use this software...but it's strange

   

It only can work when i frist conect it to PC and download fiameware...

   

All pins‘ voltage is normal

   

It just retrun "false" every  turn...

   

 

   

Last night it work well , and after a time it can't work...

   

 

   

I have tried two chip , the results are same.

   

 

   

Regards,

   

Sky.

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Anonymous
Not applicable

Hi

   

 

   

Are you using Spartan 6 or Spartan 3? The vhdl and verilog projects are provided for Spartan 6.

   

 

   

Did Fx2LP enumerate properly after programming it with the firmware provided in the AN61345?

   

 

   

Make sure that the connections are proper as shown in application Note AN61345.

   

 

   

Regards,

   

Vikas.

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Anonymous
Not applicable

Hi.

   

 

   

I use Cyclone IV.

   

I have solved this problem by replacing whole frameware project from an old one , but still can't understant what is the difference between them.

   

 

   

Now I want to ask a other question...

   

 

   

I want to use these code to reset and clear all fifo automaticly when there are some errors , but it can't work.

   

I have tried using “PA0 = 0” in TD_INIT() to test ,but it also can't work.

   

( PORTACFG |= 0x80; )

   

Now I only can Re-load frameware when errors happen , but i think it's a wrong practice.

   

 

   

My code:

   

void TD_Poll( void )
{


    if( EP2FIFOBCH_LAST == EP2FIFOBCH && EP2FIFOBCL_LAST == EP2FIFOBCL )        // if last = now , reset and clear EP2
    {
        if (!(EP2468STAT & bmEP2FULL))
        {
            FIFORESET = 0X40;
            SYNCDELAY;
            FIFORESET = 0x00;
            SYNCDELAY;
            OUTPKTEND = 0x82;               
            SYNCDELAY;                  
            OUTPKTEND = 0x82;           
            SYNCDELAY;
        }
    }

    EP2FIFOBCH_LAST = EP2FIFOBCH;
    SYNCDELAY;
    EP2FIFOBCL_LAST = EP2FIFOBCL;           
    SYNCDELAY;
 
}

   

 

   

Regards,

   

Sky.

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Anonymous
Not applicable

HI ,

   

 

   

Your code works only when FX2LP receives less number of bytes than expected. But in your case., the bytes are misplaced, so it won't work.

   

 

   

Regards,

   

Vikas.

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Anonymous
Not applicable

Hi.

   

 

   

My intention is:

   

If "XferData" return "true" and fifo's state is "not full" , it means some data didn't transfer nomally , so i must reset and clear all fifo to ensure next turn .

   

 

   

I can't understand your meaning ... this error is " bytes are misplaced "?

   

 

   

I can't find the method what can reset and clear fifo in the "CY .NET API" , so i want to do it in frameware .

   

 

   

Using "slavefifo" mode.

   

 

   

Regards,

   

Sky.

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