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Hello,
I will use GPIF II as a master. A special function signal "OE" controls whether the data bus is driven or tristated by the FX3. But there isn't a pin to use as an output enable (to enable master's outputs) at slave side.
How can the data bus driven controlled internally by GPIF II state machine?
Regards,
Ali
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Hi,
If a logic is the master of the protocol it'll be the one deciding when output is driven or tri-stated.
Please add a little more information as to why the slave qualifies when data is to be driven by the master so that I can understand your requirement better.
Regards,
Anand
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Hi Anand,
You are right. There is no need to the slave's qualify to data driven when FX3 is the master.
Sorry, I had to be more clear. I couldn't operate the GPIF II Designer properly when Interface type was Master.
So I was using the GPIF II Designer with Slave selection and the problem was related to this usage.
I am using Sync_Slave_Fifo example firmware changing the GPIF header file with the GPIF II's output.
When the GPIF II were Slave, it drives the outputs instantly if there is no OE pin. Although if the design has OE pin and it is asserted then the outputs are perminent.
When the GPIF II were Master, I couldn't get it work to drive the outputs.
Maybe the question must be "What is the proper way of running the master mode with the GPIF II?"
I hope, it is more clear now. I would appreciate if you can help me.
Regards,
Ali
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GPIF II is a programmable interface, its working depends on how you program it. Please upload the project you developed to get it working as a master. I would like to take a look at it.
Regards,
Anand
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Data is driven from the master so the data needs to be sent from to the slave when the slave samples it. Refer Section 4.6 in GPIF II Designer User Guide for programming the GPIF II Designer.