SPI with CY_U3P_SPI_SSN_CTRL_FW = 0 cuts off the serial clock?

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Anonymous
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Hi, I'm wondering if I set CY_U3P_SPI_SSN_CTRL_FW to  0 does the serial clock is cutted off during no SPI communication ?

   

I don't see how otherwise I could guarantee SSN to work properly and with the right timing.

   

what does it means "The SPI controller supports four modes of SPI communication with Start-Stop clock." Is there any way to stop the SPI_SCK outside the SSN assertion?

   

Thanks, Joel

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Anonymous
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Hi,

   

When you use CY_U3P_SPI_SSN_CTRL_FW for SPI initialization then SSN is controlled by firmware. SSN is asserted at the
beginning of a transfer and is de-asserted at the end of the transfer.

   

"The SPI controller supports four modes of SPI communication with Start-Stop clock." I think this means that all four modes of SPI communication are supported and mode will be decided based on the clock phase and polarity, which are available as part of SPI config.

   

Thanks,

   

sai krishna.

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