BCM20736 WICED-Smart-SDK-2.1.1 supports J-link debug?

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Anonymous
Not applicable

J-link can not find BCM20736 CPU.

Setting:

1:Rx remove the pull-down resistor.

2:Broadcom recommended connection.

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3:J-link recommended connection.

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Two connections I have tested. J-link does not recognize the cpu.

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1 Solution

Unfortunately, there are NO hardware Breakpoints in the chip, so you cannot single step in hardware (i.e. through the registers) on our Jlink implementation. You should be able to single step through your own code.

View solution in original post

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9 Replies
Anonymous
Not applicable

Hello libo,

Can you send a picture of which pins your Cable is attached?

Thanks

JT

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Anonymous
Not applicable

Hello JT,

J-link connection ok.

Note:

1.RESET signal is connected to the BCM20736.

2. J-ink 19pin connected to + 5V.

WICED-Smart-AN200-R document recommended circuit can not be achieved.

J-link connect to the BCM20736 is ok, but can not enter debug mode.

Do you have more detailed documentation of J-link debugging?

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Thanks.

Libo

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alexm may be able to help as he recently resolved his J-Link issue and posted a comment to the Blog here: WICED Smart J-Link Debugger

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Anonymous
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As trying to run  the GDB server yesterday, I run exactly into the same issue:

-- all hardware part -- connections, etc. -- looks OK.

-- but then, when attempting to start the GDB server -- no core found, JLink seems does not recognise the CPU, etc.

In my case, the issue was - the application I loaded was not build in debug mode.  The exact steps are described in

WICED Smart - Debugging Support Using a J-Link Probe Application Note

within introduction section, page 7.

In my case, the problem was that the application I loaded didi not have 'DEBUG = 1'  within makefile.mk

( step 1.a  in 'Introduction' section of above document).  As I fixed it, the gdb server started properly,  recognising the CPU core as Cortex-M3

Also, I noticed that you have specified speed -- while starting the server - as 'Auto'. I'm using 1000kHz. I do not know how critical it is.

I hope above helps.

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Anonymous
Not applicable

I run into the issue with JLink today. It started similar to what Libo described above -- working JLink connection, but failing IDE debug.... So that the sequence of events:

1. first, I got the problem to use the Eclipse IDE - I was able to start GDB server, start debug session, but then the projects got missed up, looking for wrong source files, etc.

2. then, I reset the power on the board;

3. then, I failed to download the project into the board.

4. I tried to recover the board:

"

make proximity-BCM920737TAG_Q32 recover UART=/dev/tty.usbserial-0000111DA

Linking target ELF

OK, made elf.

...

Converting CGS to HEX...

Conversion complete

Creating OTA images...

Conversion complete

OTA image footprint in NV is 4891 bytes

Recovering platform ...

Recovery complete

Application running

"

5. now, I'm constantly failing to download any other target application:

"

Converting CGS to HEX...

Conversion complete

Creating OTA images...

Conversion complete

OTA image footprint in NV is 5408 bytes

Detecting device...

+------------------------------------------------------------------------------------------+

| No BCM20737 detected                                                                     |

| 1. Verify the BCM20737 tag is connected _AND_ powered                                    |

| 2. Verify SW2 and SW3 switches are towards Vusb and Vreg respectively and all SW4        |

|     switches are set to ON                                                               |

| 3. Press the reset button on the tag and retry                                           |

|                                                                                          |

| If this problem persists, the EEPROM on the tag may be corrupted                         |

| Please see Appendix D in the Quick Start Guide for recovery instructions                 |

+------------------------------------------------------------------------------------------+

Download failed. This version of the SDK only supports download to BCM20736A1 and BCM20737A1 devices

"

6. Since recovery, it seems that I lost the possibility to connect JLink.

It looks that somehow, I managed to create a 'brick'...

I would appreciate any idea how to recover the board.

Thanks,

Michael.

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Anonymous
Not applicable

1. Well... After multiple reseting, recover, removing the power, etc.... the 'brick' waked up... I'm able to download.  A bit strange, but ok....

2. But now, I guess I'm running into the issue, described at earlier by Libo:

a. The Eclipse shows:

Eclipse.tiff.jpg

b. Eclipse complained ( above) that can not find the source file. But... quick check shows that it exists:

"

mbp:dev michael$ cd /Volumes/Users/michael/Devlab/Broadcom/WICED-Smart-SDK/Apps/pwm_tones/

mbp:pwm_tones michael$ pwd

/Volumes/Users/michael/Devlab/Broadcom/WICED-Smart-SDK/Apps/pwm_tones

mbp:pwm_tones michael$ ls -la

total 48

drwxrwxr-x   4 michael  wheel    136  3 Dec 21:12 .

drwxrwxr-x  34 michael  wheel   1156 19 Nov 21:36 ..

-rwxrwxr-x   1 michael  wheel    753  3 Dec 00:29 makefile.mk

-rwxr-xr-x   1 michael  wheel  16420  3 Dec 21:07 pwm_tones.c

"

c. At the same time, the server terminal shows:

Gdb.tiff.jpg


3. I guess it is the same result to what Libo produced earlier  on Dec 3, 2014 at 6:27am..

"...

J-link connect to the BCM20736 is ok, but can not enter debug mode.

...

"

Actually, while looking at his Eclipse screenshot, most right part of it - 'Make Target' panel -- I noticed that the 'clean' target is marked as selected.

During my exercises above, I noticed that the SDK environment set up in a "strange way". You have to select the 'right project' within the 'Make Target' panel BEFORE starting the debug session. Otherwise, the Eclipse would try to look for the wrong files.

In my case, it does not FIND the file(s) for some reason, but at least it IS TRYING to find the right one....

Anyway, above are the observations I got. It hope somehow it would be possible to make sense out of it.

If somebody got an idea how to make it all work -- please, let me know!

Thanks,

Michael.

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Anonymous
Not applicable

Thank you for your suggestion.

J-link can enter debug mode.

Expressions default value is 0.

I can set variables.spar_debug_continues values are changed.

I can see the disassembly single step.

In the source code can not be achieved in a single step operation.

What is the reason?

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Unfortunately, there are NO hardware Breakpoints in the chip, so you cannot single step in hardware (i.e. through the registers) on our Jlink implementation. You should be able to single step through your own code.

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Anonymous
Not applicable

Thanks mwf_mmfae.

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