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I want to have my FPGA service 2 producer/consumer endpoints. One will use packet bursting and one a single USB 3.0 packet. I have the bursting EP working... beautiful... but I simply can't figure out how, with the FX3 API, to add the second endpoint using a smaller buffer. In all, I want 1 thread assigned to each of the data transfer directions for each of the 2 endpoints. I've compiled an image file with what I'd hoped were the proper changes to the basic synchronous slave fifo firmware design example in thre SDK but the second endpoint doesn't show up in the Control Center application. Anyone have suggestions? I'm finding the documentation and examples lacking as guidance and have no prior experience with the Cypress tools.
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Maybe something is wrong with USB configuration descriptor.
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Yes, no doubt. My problem is trying to set up up multiple dma descriptors. I can't find any similar examples to glean insight from. The bulk many-to-one example would seem to be along a similar path but isn't helping... What I want to do certainly can't be that unique.
thanks for the reply, bill
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Yes. Unfortunatley we don't have any example that suits your requirement.
But you can attach your code here. I will look into it to findout what is going wrong in there.
Thanks,
sai krishna.
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Sai,
I found one error in cyfxslfifousbdscr.c in that I didn't change the total size of all descriptors for super speed... at least now I can see the 2 new endpoints and proceed with debugging. Instead of 0x2C, 0x00 it should be 0x46, 0x00. Did you find any other issues that I haven't?
thanks and regards, bill
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That is right.
Other thing is that, I am not sure if you are planning test your application with USB 2.0 host. But if you need USB2.0 support as well then you need to decide the epcfg.burstlen based on the USB bus speed. It should be one in case of USB2.0. Otherwise, CyU3PSetEpConfig fails in your application.
Thanks,
sai krishna.