Comparator output

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Anonymous
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In psoc 3,

   

I used a comparator to compare two voltage levels and displaying on LCD, which one is high.  At the comparator output i added a digital output pin. By enabling the hardware connection option of the digital output pin, i am able to put on and off an LED with respect to input voltage levels of the comparator.

   

when i try to read the status of the digital output pin (with hardware connection disabled) in my software, iam getting a wrong result. Pl suggest me how to read the status of the comparator output in software.

   

thanks

   

kavin

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10 Replies
Anonymous
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  •  Hi Kavin. If you disable the hardware connection on the pin, the pin is no longer connected to the Comparator output. You can retain the hardware connection and then try reading the Pin to find its status.
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  • If your intention is to only find out the status of the comparator output, I would suggest you to connect a Status register at the output of the comparator and reading the status register will reflect the comparator. You can find the Status register component in the Component catalog under Digital -> Registers folder. To read the resgister you can the use the API Status_Reg_Read(); it is as simple as that. The API will return the value of the staus register.
  •    
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Anonymous
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Hi Kavin,

   

 

   

Another way is to simply read the comparator output using the API "Comp_GetCompare( )".

   

This API returns a nonzero value when the voltage connected to the positive input of the comparator is greater than the negative input voltage.

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Anonymous
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thanks

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Anonymous
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I am using the PSoC SDK -030 kit. What is the best way to combine a comparator and counter. I am currently using an RH sensor. I am interigatating the sensor with a 10Khz clock. I am looking at the peak voltage at 1/3 nominal value. Then the comparator needs to stop a counter. Any ideas?

   

 

   

Thanks

   

Philip

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Anonymous
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 Give Comparator output to the Capture input of the Counter component and try out.

   

 

   

You might have to use the Sync component between the output of Comparator to the input of Counter.

   

 

   

Regards,

   

Kishore.

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ETRO_SSN583
Level 9
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At a minimum comparator needs to have hysteresis applied to it. That will take
care of system noise, and insure comparator outputs meets full logic levels.

   

 

   

The comparator is nothing more than a high gain amp, usually with no compensation
capacitor to slow it down. That, however, is a recipe for disaster if no hysteresis is used.
If an input signal hovers at comp trip point, system noise will make its output oscillate.
That in turn will violate setup and hold times at a logic input. Hence the use of hysteresis.

   

 

   

A safer method would be to set a D FF with the comparator (with hysteresis), and then you
take care of reset. Enough Hysteresis will insure D gets clocked properly, then you take
care of the reset problem at your leisure.

   

 

   

'Regards, Dana.
 

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Anonymous
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 Hi Dana,

   

 

   

Instead of using a D-Flip Flop to the output of Comparator, we can use the clocked version of the comparator which does exactly what you have mentioned.

   

 

   

-

   

Kishore.

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Anonymous
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I am using the PSoC 3 comparator to find the time for an RC circuit. The C changes with humidity. I tied the output to a counter.

   

I am having problems with my code for the counter. It was very easy in PSoC 1. Is there any snippet of code for a counter module?

   

 

   

Thank You,

   

Philip

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ETRO_SSN583
Level 9
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If you right click a counter component, pick "Find Example Project", and pick

   

"Add Example Project to New workspace" you will be given a basic project.

   

 

   

The following is a period cntr I did for another gent, it might be of help.

   

 

   

http://www.psocdeveloper.com/forums/viewtopic.php?f=42&t=9478

   

 

   

Regards, Dana.

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Anonymous
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 Hi Philip,

   

 

   

I hope you are using window comparator setup for measuring the RC time constant. Give one trigger to enable pin of counter component when the voltage started cross lower limit and give one trigger to capture input of counter when the voltage crosses upper limit. Read the capture value and calculate the time with respect to the clock input to counter.

   

Make sure that counter is not getting reloaded during this period. You can change the resolution for that. Otherwise, increment a variable in ISR (triggered by interrupt on reload) and then calculate the accurate timing.

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