PSoC 3 Hibernate Current

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Anonymous
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Hi, I am experimenting with using the PSoC 3 in low power modes and I have gotten some unexpected results. When I put the device in hibernate mode and i meter the current, I am getting about 560 uA, though the datasheet says this should be only about 200 nA.

   

I am using the CY8CKIT-030 PSoC® 3 Development Kit and I disabled the potentiometer and removed the LCD.

   

Does anyone have any ideas how I can lower this current? I would at least like to be on the same order of magnitude as the datasheet.

   

Thanks in advance.

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5 Replies
Anonymous
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Did you follow are the modifications specified in the "Low Power Functionality" section of the CY8CKIT-030 User guide - http://www.cypress.com/?rID=49524?

   

Also make sure that you put the device into hibernate mode in proper sequence specified in this Application note - http://www.cypress.com/?rID=64554

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Anonymous
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Did you follow are the modifications specified in the "Low Power Functionality" section of the CY8CKIT-030 User guide - http://www.cypress.com/?rID=49524?

   

Also make sure that you put the device into hibernate mode in proper sequence specified in this Application note - http://www.cypress.com/?rID=64554

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Bob_Marlowe
Level 10
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It is always very difficult to measure the current into a complex chip when it is already built into a complete board that contains several other chips (RS232 level shifter, regulators and a separate USB-chip) There was an advice from a cypress engineer showing some traces to be cut and resistors to remove, but the measures seemingly have not been very successful.

   

Since the chip has several ground- connections and several different supply-pins this can be rather difficult. A rough (!!) estimation would be to remove the processor-board and measure the current into the -001 kit subtracting this value from the formerly measured 560 µA.

   

Another chice would be to cut the power-traces on the processor-board and measure the current there.

   

Lastly you have got the choice to trust to Cypress's guaranteed power consumption.

   

 

   

Bob

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ETRO_SSN583
Level 9
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The -030 kit does not appear to need any trace cutting to perform the

   

measurements, from the ap note posted earlier -

   

 

   

CY8CKIT-030 and CY8CKIT-050 Modifications

   


The following steps demonstrate how to modify the CY8CKIT-030 and CY8CKIT-050 DVK boards to ensure proper current
measurements. The configuration described here uses a single power rail for Vddd, Vdda, and Vddio. Power is measured by
placing a meter in series with the PSoC‟s Vddd pins. 

   


1.  Remove R23. This separates the VDDA net from the VDDA_P net.
2.  Add a zero-ohm resistor to the pads for R30. This ties  VDDD to VDDA so that you can measure the total current
consumed by the PSoC.
3.  Remove R58. This separates the RS-232 driver U8 from VDDA. By default, U8 is powered by VDDA, so it will show up in
your power measurement.
4.  If RS-232 is needed, short pin 2 of J37 (above the “J37” text) to the VDDA_P test point. This powers  the RS-232 driver
from VDDA_P instead of VDDA so that it will not show up in your power measurements.
5.  Remove the jumper from J30. By default, R56 is powered by VDDA, so it will show up in your power measurement.
6.  Short pin 2 of J30 (below the “J30” text) to the VDDA_P test point. This powers the potentiometer R56 from VDDA_P.
7.  Remove the jumper from J10.
8.  Connect the LOW side lead from the multimeter to the center pin of J10.
9.  Connect the HIGH side lead from the multimeter to one of the outside pins (for 5-V or 3.3-V operation) of J10.
After  these modifications are made, the total current drawn by the PSoC can be accurately measured.  All the other
components on the DVK board are powered separately from Vddd, so they will not be seen in your power measurements. The
DVK can be configured for 5-V or 3.3-V operation without any further changes by using J10 and J11.

   

 

   

Regards, Dana.

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Anonymous
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Hi sclukey,

   

 

   

Did you see any improvement in the hibernate current?

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