CY7C68013A Stops Data Transmission to FPGA

Tip / Sign in to post questions, reply, level up, and achieve exciting badges. Know more

cross mob
lock attach
Attachments are accessible only for community members.
SaSh_283021
Level 1
Level 1

 Hello,

   

I am working on USB device, which receives data from Windows PC over USB and Tansmit data over ethernet lines to slave devices. My end points configuration is 

   

EP 2 - AUTOOUT, 2x Bulk, 512 Bytes

   

EP4 - AUTOOUT, 2x Bulk, 512 Bytes

   

EP6 - AUTOIN, 2x Bulk, 512 Bytes

   

EP8 - AUTOIN, 2x Bulk, 512 Bytes

   

My Cypress Chip is working in Slave FIFO Mode and Spartan 6 FPGA is acting as master. i am able to receive data on my host pc from usb device via end point 6 and 8 without any problem and i am able to transmitt data from host pc to usb device via end point 4 without any issue. Rx and Tx are working independently without any problem. 

   

But when i am doing bulk transfer on end point 2, the communication stops after 130 transmission of 512 bytes chunk. 

   

I have check data on USB Analyzer. I am not getting acknowledgement of my last transmitted packet. I have attached signals received on chipscope. 

   

Please help me solve this issue.

0 Likes
1 Reply
Anonymous
Not applicable

Hi,

   

Could you please create a tech support case regsrding the issue that you are seeing.

   

Also please attach all the necessary project files to the case.

   

Thanks,

   

sai krishna.

0 Likes