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Hi!
I found strange behavior of library CyAPI.lib.
My goal is further develop the program written in c++ that quickly transfers data through USB. I use CY7C68013A in slave mode. I filled transmitted from PC buffer by counter 1,2,3 ... and controls the oscilloscope is synchronized "BUFFER
EMPTY" and show FD bus on the screen. Transmission was fixated and was conducted with the greatest possible speed. I write Test programm on c#. it use CyUsb.dll and works great.I could see the counter on the oscilloscope screen.But when I tried to use this same test in c++ program, I found transmission failures.
not working variant:
OutEndpt->XferData(&zgl[0], l);
not working variant:
UCHAR *outContext = USBDevice->BulkOutEndPt->BeginDataXfer(buffer, length,&outOvLap);
USBDevice->BulkOutEndPt->WaitForXfer(&outOvLap,100);
USBDevice->BulkOutEndPt->FinishDataXfer(buffer, length, &outOvLap,outContext);
not working variant:
DeviceIoControl (hDevice,IOCTL_ADAPT_SEND_NON_EP0_DIRECT,
pXmitBuf, iXmitBufSize,buf, bufLen,&dwReturnBytes, ov);
working variant:
DeviceIoControl (hDevice,IOCTL_ADAPT_SEND_NON_EP0_DIRECT,
pXmitBuf, iXmitBufSize,&zgl[0], xfer,
&l, (LPOVERLAPPED)NULL);
But this variant does not use overlapping. I assume that the signal of the completion occurs before completion of the transaction in CyAPI.lib.
is there a way to use overlapping in CyAPI.lib?
I use vs2010, Windows XP SP3 on test PC. windows7 on testing PC, remote debuggin by tcp.ip.
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a little clarification:
CY7C68013A connected to fpga that monitors "BUFFER EMPTY" signal and read data in Synchronous Timing Model. Data transmitted in bulk mode.