Interfacing SPI EEPROM with PSoC3

Tip / Sign in to post questions, reply, level up, and achieve exciting badges. Know more

cross mob
himam_31
Employee
Employee
50 likes received 25 likes received 10 likes received

Attached is the project for interfacing SPI EEPROM with PSoC3. AT93C46E SPI EEPROM module was interfaced with PSoC3 in this project.

0 Likes
11 Replies
himam_31
Employee
Employee
50 likes received 25 likes received 10 likes received
0 Likes
himam_31
Employee
Employee
50 likes received 25 likes received 10 likes received
0 Likes
himam_31
Employee
Employee
50 likes received 25 likes received 10 likes received
0 Likes
himam_31
Employee
Employee
50 likes received 25 likes received 10 likes received

 Attaching the project

0 Likes
Bob_Marlowe
Level 10
Level 10
First like given 50 questions asked 10 questions asked

Try to use ms internet explorer, chrome seems to have problems here

   

 

   

Bob

0 Likes
Anonymous
Not applicable

Hi PSoCRulez,

   

 

   

If you have trouble in uploading the project, you can mail the archived project to me at dasg@cypress.com

   

I'll upload the project in the forum for you.

0 Likes
lock attach
Attachments are accessible only for community members.
Anonymous
Not applicable

Hi All,

   

 

   

I'm uploading the project on behalf of PSoCRulez.

0 Likes
ETRO_SSN583
Level 9
Level 9
250 likes received 100 sign-ins 5 likes given


Some thoughts -

   


1) Should not

   

 

   

while( !( SPIM_ReadTxStatus() & SPIM_STS_SPI_DONE ) );

   

 

   

be typed as

   

 

   

while( !(SPIM_ReadTxStatus() == SPIM_STS_SPI_DONE ) );

   

 

   

2) What is the purpose fo the cap on sclk ? You state "reliability" but
generally speaking terminating a clock line with C is undesired.

0 Likes
ETRO_SSN583
Level 9
Level 9
250 likes received 100 sign-ins 5 likes given

One other thing, you have all the interrupts enabled, but I do not

   

see any associated ISR's to service them ? Or placement of a

   

ISR component on an ISR output ?

   

 

   

Regards, Dana.

0 Likes
ETRO_SSN583
Level 9
Level 9
250 likes received 100 sign-ins 5 likes given

Your signal SS pin, is that a CS for EEPROM ? If so you are meeting the

   

stated conditions -

   

 

   

WRITE (WRITE): The Write (WRITE) instruction contains the 16 bits of data to be written into
the specified memory location. The self-timed programming cycle, tWP, starts after the last bit of
data is received at serial data input pin DI. The DO pin outputs the ready/busy status of the part
if CS is brought high after being kept low for a minimum of 250 ns (tCS). A logic “0” at DO indi-
cates that programming is still in progress. A logic “1” indicates that the memory location at the
specified address has been written with the data pattern contained in the instruction and the part
is ready for further instructions. A ready/busy status cannot be obtained if the CS is brought
high after the end of the self-timed programming cycle, t .

   

 

   

Regards, Dana.

0 Likes
ETRO_SSN583
Level 9
Level 9
250 likes received 100 sign-ins 5 likes given

My mistake, I see these are status register bits, not return

   

values, so do not change the "&" typing for testing state.

   

 

   

Regards, Dana.

0 Likes