Static Timing Analysis

Project : BLE_Temperature_Measurement01
Build Time : 01/11/18 18:46:33
Device : CYBLE-222014-01
Temperature : -40C - 85C
VDDA : 3.30
VDDA_CTB : 3.30
VDDD_0 : 3.30
VDDIO_0 : 3.30
VDDIO_1 : 3.30
VDDIO_2 : 3.30
VDDR_BGLS : 3.30
VDDR_HF : 3.30
VDDR_HLS : 3.30
VDDR_LF : 3.30
VDDR_SYN : 3.30
Voltage : 3.3
Expand All | Collapse All | Show All Paths | Hide All Paths
+ Timing Violation Section
No Timing Violations
+ Clock Summary Section
Clock Domain Nominal Frequency Required Frequency Maximum Frequency Violation
ADC_intClock(FFB) ADC_intClock(FFB) 6.857 MHz 6.857 MHz N/A
CyECO CyECO 24.000 MHz 24.000 MHz N/A
CyHFCLK CyHFCLK 48.000 MHz 48.000 MHz N/A
ADC_intClock CyHFCLK 6.857 MHz 8.000 MHz N/A
UART_SCBCLK CyHFCLK 153.355 kHz 153.355 kHz N/A
Clock_1 CyHFCLK 1.000 kHz 1.000 kHz 55.919 MHz
CyILO CyILO 32.000 kHz 32.000 kHz N/A
CyIMO CyIMO 48.000 MHz 48.000 MHz N/A
CyLFCLK CyLFCLK 32.768 kHz 32.768 kHz N/A
CyRouted1 CyRouted1 48.000 MHz 48.000 MHz N/A
CySYSCLK CySYSCLK 24.000 MHz 24.000 MHz N/A
CyWCO CyWCO 32.768 kHz 32.768 kHz N/A
UART_SCBCLK(FFB) UART_SCBCLK(FFB) 153.355 kHz 153.355 kHz N/A
+ Register to Register Section
+ Setup Subsection
Path Delay Requirement : 1e+006ns(1 kHz)
Source Destination FMax Delay (ns) Slack (ns) Violation
\PWM:PWMUDB:sP8:pwmdp:u0\/z0_comb \PWM:PWMUDB:sP8:pwmdp:u0\/cs_addr_2 55.919 MHz 17.883 999982.117
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell1 U(1,0) 1 \PWM:PWMUDB:sP8:pwmdp:u0\ \PWM:PWMUDB:sP8:pwmdp:u0\/clock \PWM:PWMUDB:sP8:pwmdp:u0\/z0_comb 3.850
datapathcell1 U(1,0) 1 \PWM:PWMUDB:sP8:pwmdp:u0\ \PWM:PWMUDB:sP8:pwmdp:u0\/z0_comb \PWM:PWMUDB:sP8:pwmdp:u0\/cs_addr_2 2.513
datapathcell1 U(1,0) 1 \PWM:PWMUDB:sP8:pwmdp:u0\ SETUP 11.520
Clock Skew 0.000
\PWM:PWMUDB:runmode_enable\/q \PWM:PWMUDB:sP8:pwmdp:u0\/cs_addr_1 62.810 MHz 15.921 999984.079
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell2 U(1,0) 1 \PWM:PWMUDB:runmode_enable\ \PWM:PWMUDB:runmode_enable\/clock_0 \PWM:PWMUDB:runmode_enable\/q 1.250
Route 1 \PWM:PWMUDB:runmode_enable\ \PWM:PWMUDB:runmode_enable\/q \PWM:PWMUDB:sP8:pwmdp:u0\/cs_addr_1 3.151
datapathcell1 U(1,0) 1 \PWM:PWMUDB:sP8:pwmdp:u0\ SETUP 11.520
Clock Skew 0.000
\PWM:PWMUDB:sP8:pwmdp:u0\/z0_comb \PWM:PWMUDB:genblk8:stsreg\/status_2 73.921 MHz 13.528 999986.472
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell1 U(1,0) 1 \PWM:PWMUDB:sP8:pwmdp:u0\ \PWM:PWMUDB:sP8:pwmdp:u0\/clock \PWM:PWMUDB:sP8:pwmdp:u0\/z0_comb 3.850
Route 1 \PWM:PWMUDB:tc_i\ \PWM:PWMUDB:sP8:pwmdp:u0\/z0_comb \PWM:PWMUDB:status_2\/main_1 2.518
macrocell1 U(1,0) 1 \PWM:PWMUDB:status_2\ \PWM:PWMUDB:status_2\/main_1 \PWM:PWMUDB:status_2\/q 3.350
Route 1 \PWM:PWMUDB:status_2\ \PWM:PWMUDB:status_2\/q \PWM:PWMUDB:genblk8:stsreg\/status_2 2.240
statusicell1 U(1,0) 1 \PWM:PWMUDB:genblk8:stsreg\ SETUP 1.570
Clock Skew 0.000
\PWM:PWMUDB:runmode_enable\/q \PWM:PWMUDB:genblk8:stsreg\/status_2 86.775 MHz 11.524 999988.476
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell2 U(1,0) 1 \PWM:PWMUDB:runmode_enable\ \PWM:PWMUDB:runmode_enable\/clock_0 \PWM:PWMUDB:runmode_enable\/q 1.250
Route 1 \PWM:PWMUDB:runmode_enable\ \PWM:PWMUDB:runmode_enable\/q \PWM:PWMUDB:status_2\/main_0 3.114
macrocell1 U(1,0) 1 \PWM:PWMUDB:status_2\ \PWM:PWMUDB:status_2\/main_0 \PWM:PWMUDB:status_2\/q 3.350
Route 1 \PWM:PWMUDB:status_2\ \PWM:PWMUDB:status_2\/q \PWM:PWMUDB:genblk8:stsreg\/status_2 2.240
statusicell1 U(1,0) 1 \PWM:PWMUDB:genblk8:stsreg\ SETUP 1.570
Clock Skew 0.000
\PWM:PWMUDB:sP8:pwmdp:u0\/cl0_comb \PWM:PWMUDB:prevCompare1\/main_0 87.504 MHz 11.428 999988.572
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell1 U(1,0) 1 \PWM:PWMUDB:sP8:pwmdp:u0\ \PWM:PWMUDB:sP8:pwmdp:u0\/clock \PWM:PWMUDB:sP8:pwmdp:u0\/cl0_comb 5.680
Route 1 \PWM:PWMUDB:cmp1_less\ \PWM:PWMUDB:sP8:pwmdp:u0\/cl0_comb \PWM:PWMUDB:prevCompare1\/main_0 2.238
macrocell3 U(1,0) 1 \PWM:PWMUDB:prevCompare1\ SETUP 3.510
Clock Skew 0.000
\PWM:PWMUDB:sP8:pwmdp:u0\/cl0_comb \PWM:PWMUDB:status_0\/main_1 87.504 MHz 11.428 999988.572
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell1 U(1,0) 1 \PWM:PWMUDB:sP8:pwmdp:u0\ \PWM:PWMUDB:sP8:pwmdp:u0\/clock \PWM:PWMUDB:sP8:pwmdp:u0\/cl0_comb 5.680
Route 1 \PWM:PWMUDB:cmp1_less\ \PWM:PWMUDB:sP8:pwmdp:u0\/cl0_comb \PWM:PWMUDB:status_0\/main_1 2.238
macrocell4 U(1,0) 1 \PWM:PWMUDB:status_0\ SETUP 3.510
Clock Skew 0.000
\PWM:PWMUDB:sP8:pwmdp:u0\/cl0_comb Net_463/main_1 87.504 MHz 11.428 999988.572
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell1 U(1,0) 1 \PWM:PWMUDB:sP8:pwmdp:u0\ \PWM:PWMUDB:sP8:pwmdp:u0\/clock \PWM:PWMUDB:sP8:pwmdp:u0\/cl0_comb 5.680
Route 1 \PWM:PWMUDB:cmp1_less\ \PWM:PWMUDB:sP8:pwmdp:u0\/cl0_comb Net_463/main_1 2.238
macrocell5 U(1,0) 1 Net_463 SETUP 3.510
Clock Skew 0.000
\PWM:PWMUDB:genblk1:ctrlreg\/control_7 \PWM:PWMUDB:runmode_enable\/main_0 119.962 MHz 8.336 999991.664
Type Location Fanout Instance/Net Source Dest Delay (ns)
controlcell1 U(1,0) 1 \PWM:PWMUDB:genblk1:ctrlreg\ \PWM:PWMUDB:genblk1:ctrlreg\/clock \PWM:PWMUDB:genblk1:ctrlreg\/control_7 2.580
Route 1 \PWM:PWMUDB:control_7\ \PWM:PWMUDB:genblk1:ctrlreg\/control_7 \PWM:PWMUDB:runmode_enable\/main_0 2.246
macrocell2 U(1,0) 1 \PWM:PWMUDB:runmode_enable\ SETUP 3.510
Clock Skew 0.000
\PWM:PWMUDB:runmode_enable\/q Net_463/main_0 126.534 MHz 7.903 999992.097
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell2 U(1,0) 1 \PWM:PWMUDB:runmode_enable\ \PWM:PWMUDB:runmode_enable\/clock_0 \PWM:PWMUDB:runmode_enable\/q 1.250
Route 1 \PWM:PWMUDB:runmode_enable\ \PWM:PWMUDB:runmode_enable\/q Net_463/main_0 3.143
macrocell5 U(1,0) 1 Net_463 SETUP 3.510
Clock Skew 0.000
\PWM:PWMUDB:prevCompare1\/q \PWM:PWMUDB:status_0\/main_0 143.041 MHz 6.991 999993.009
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell3 U(1,0) 1 \PWM:PWMUDB:prevCompare1\ \PWM:PWMUDB:prevCompare1\/clock_0 \PWM:PWMUDB:prevCompare1\/q 1.250
Route 1 \PWM:PWMUDB:prevCompare1\ \PWM:PWMUDB:prevCompare1\/q \PWM:PWMUDB:status_0\/main_0 2.231
macrocell4 U(1,0) 1 \PWM:PWMUDB:status_0\ SETUP 3.510
Clock Skew 0.000
+ Hold Subsection
Source Destination Slack (ns) Violation
\PWM:PWMUDB:status_0\/q \PWM:PWMUDB:genblk8:stsreg\/status_0 1.498
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell4 U(1,0) 1 \PWM:PWMUDB:status_0\ \PWM:PWMUDB:status_0\/clock_0 \PWM:PWMUDB:status_0\/q 1.250
Route 1 \PWM:PWMUDB:status_0\ \PWM:PWMUDB:status_0\/q \PWM:PWMUDB:genblk8:stsreg\/status_0 2.248
statusicell1 U(1,0) 1 \PWM:PWMUDB:genblk8:stsreg\ HOLD -2.000
Clock Skew 0.000
\PWM:PWMUDB:prevCompare1\/q \PWM:PWMUDB:status_0\/main_0 3.481
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell3 U(1,0) 1 \PWM:PWMUDB:prevCompare1\ \PWM:PWMUDB:prevCompare1\/clock_0 \PWM:PWMUDB:prevCompare1\/q 1.250
Route 1 \PWM:PWMUDB:prevCompare1\ \PWM:PWMUDB:prevCompare1\/q \PWM:PWMUDB:status_0\/main_0 2.231
macrocell4 U(1,0) 1 \PWM:PWMUDB:status_0\ HOLD 0.000
Clock Skew 0.000
\PWM:PWMUDB:genblk1:ctrlreg\/control_7 \PWM:PWMUDB:runmode_enable\/main_0 4.286
Type Location Fanout Instance/Net Source Dest Delay (ns)
controlcell1 U(1,0) 1 \PWM:PWMUDB:genblk1:ctrlreg\ \PWM:PWMUDB:genblk1:ctrlreg\/clock \PWM:PWMUDB:genblk1:ctrlreg\/control_7 2.040
Route 1 \PWM:PWMUDB:control_7\ \PWM:PWMUDB:genblk1:ctrlreg\/control_7 \PWM:PWMUDB:runmode_enable\/main_0 2.246
macrocell2 U(1,0) 1 \PWM:PWMUDB:runmode_enable\ HOLD 0.000
Clock Skew 0.000
\PWM:PWMUDB:runmode_enable\/q Net_463/main_0 4.393
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell2 U(1,0) 1 \PWM:PWMUDB:runmode_enable\ \PWM:PWMUDB:runmode_enable\/clock_0 \PWM:PWMUDB:runmode_enable\/q 1.250
Route 1 \PWM:PWMUDB:runmode_enable\ \PWM:PWMUDB:runmode_enable\/q Net_463/main_0 3.143
macrocell5 U(1,0) 1 Net_463 HOLD 0.000
Clock Skew 0.000
\PWM:PWMUDB:runmode_enable\/q \PWM:PWMUDB:sP8:pwmdp:u0\/cs_addr_1 4.401
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell2 U(1,0) 1 \PWM:PWMUDB:runmode_enable\ \PWM:PWMUDB:runmode_enable\/clock_0 \PWM:PWMUDB:runmode_enable\/q 1.250
Route 1 \PWM:PWMUDB:runmode_enable\ \PWM:PWMUDB:runmode_enable\/q \PWM:PWMUDB:sP8:pwmdp:u0\/cs_addr_1 3.151
datapathcell1 U(1,0) 1 \PWM:PWMUDB:sP8:pwmdp:u0\ HOLD 0.000
Clock Skew 0.000
\PWM:PWMUDB:sP8:pwmdp:u0\/cl0_comb \PWM:PWMUDB:prevCompare1\/main_0 5.368
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell1 U(1,0) 1 \PWM:PWMUDB:sP8:pwmdp:u0\ \PWM:PWMUDB:sP8:pwmdp:u0\/clock \PWM:PWMUDB:sP8:pwmdp:u0\/cl0_comb 3.130
Route 1 \PWM:PWMUDB:cmp1_less\ \PWM:PWMUDB:sP8:pwmdp:u0\/cl0_comb \PWM:PWMUDB:prevCompare1\/main_0 2.238
macrocell3 U(1,0) 1 \PWM:PWMUDB:prevCompare1\ HOLD 0.000
Clock Skew 0.000
\PWM:PWMUDB:sP8:pwmdp:u0\/cl0_comb \PWM:PWMUDB:status_0\/main_1 5.368
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell1 U(1,0) 1 \PWM:PWMUDB:sP8:pwmdp:u0\ \PWM:PWMUDB:sP8:pwmdp:u0\/clock \PWM:PWMUDB:sP8:pwmdp:u0\/cl0_comb 3.130
Route 1 \PWM:PWMUDB:cmp1_less\ \PWM:PWMUDB:sP8:pwmdp:u0\/cl0_comb \PWM:PWMUDB:status_0\/main_1 2.238
macrocell4 U(1,0) 1 \PWM:PWMUDB:status_0\ HOLD 0.000
Clock Skew 0.000
\PWM:PWMUDB:sP8:pwmdp:u0\/cl0_comb Net_463/main_1 5.368
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell1 U(1,0) 1 \PWM:PWMUDB:sP8:pwmdp:u0\ \PWM:PWMUDB:sP8:pwmdp:u0\/clock \PWM:PWMUDB:sP8:pwmdp:u0\/cl0_comb 3.130
Route 1 \PWM:PWMUDB:cmp1_less\ \PWM:PWMUDB:sP8:pwmdp:u0\/cl0_comb Net_463/main_1 2.238
macrocell5 U(1,0) 1 Net_463 HOLD 0.000
Clock Skew 0.000
\PWM:PWMUDB:sP8:pwmdp:u0\/z0_comb \PWM:PWMUDB:sP8:pwmdp:u0\/cs_addr_2 5.783
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell1 U(1,0) 1 \PWM:PWMUDB:sP8:pwmdp:u0\ \PWM:PWMUDB:sP8:pwmdp:u0\/clock \PWM:PWMUDB:sP8:pwmdp:u0\/z0_comb 3.270
datapathcell1 U(1,0) 1 \PWM:PWMUDB:sP8:pwmdp:u0\ \PWM:PWMUDB:sP8:pwmdp:u0\/z0_comb \PWM:PWMUDB:sP8:pwmdp:u0\/cs_addr_2 2.513
datapathcell1 U(1,0) 1 \PWM:PWMUDB:sP8:pwmdp:u0\ HOLD 0.000
Clock Skew 0.000
\PWM:PWMUDB:runmode_enable\/q \PWM:PWMUDB:genblk8:stsreg\/status_2 7.954
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell2 U(1,0) 1 \PWM:PWMUDB:runmode_enable\ \PWM:PWMUDB:runmode_enable\/clock_0 \PWM:PWMUDB:runmode_enable\/q 1.250
Route 1 \PWM:PWMUDB:runmode_enable\ \PWM:PWMUDB:runmode_enable\/q \PWM:PWMUDB:status_2\/main_0 3.114
macrocell1 U(1,0) 1 \PWM:PWMUDB:status_2\ \PWM:PWMUDB:status_2\/main_0 \PWM:PWMUDB:status_2\/q 3.350
Route 1 \PWM:PWMUDB:status_2\ \PWM:PWMUDB:status_2\/q \PWM:PWMUDB:genblk8:stsreg\/status_2 2.240
statusicell1 U(1,0) 1 \PWM:PWMUDB:genblk8:stsreg\ HOLD -2.000
Clock Skew 0.000
+ Clock To Output Section
+ Clock_1
Source Destination Delay (ns)
Net_463/q Coil_Input(0)_PAD 21.345
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell5 U(1,0) 1 Net_463 Net_463/clock_0 Net_463/q 1.250
Route 1 Net_463 Net_463/q Coil_Input(0)/pin_input 5.802
iocell10 P0[5] 1 Coil_Input(0) Coil_Input(0)/pin_input Coil_Input(0)/pad_out 14.293
Route 1 Coil_Input(0)_PAD Coil_Input(0)/pad_out Coil_Input(0)_PAD 0.000
Clock Clock path delay 0.000