Static Timing Analysis

Project : LCR-Meter PsoC5
Build Time : 03/11/16 10:49:55
Device : CY8C5888LTI-LP097
Temperature : -40C - 85/125C
VDDA : 5.00
VDDABUF : 5.00
VDDD : 5.00
VDDIO0 : 5.00
VDDIO1 : 5.00
VDDIO2 : 5.00
VDDIO3 : 5.00
VUSB : 5.00
Voltage : 5
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+ Timing Violation Section
No Timing Violations
+ Clock Summary Section
Clock Domain Nominal Frequency Required Frequency Maximum Frequency Violation
ADC_Del_Ext_CP_Clk ADC_Del_Ext_CP_Clk 24.000 MHz 24.000 MHz N/A
ADC_Del_Ext_CP_Clk(routed) ADC_Del_Ext_CP_Clk(routed) 24.000 MHz 24.000 MHz N/A
ADC_Del_theACLK(fixed-function) ADC_Del_theACLK(fixed-function) 774.194 kHz 800.000 kHz N/A
CyBUS_CLK(fixed-function) CyBUS_CLK(fixed-function) 24.000 MHz 24.000 MHz N/A
CyILO CyILO 1.000 kHz 1.000 kHz N/A
CyIMO CyIMO 3.000 MHz 3.000 MHz N/A
CyMASTER_CLK CyMASTER_CLK 24.000 MHz 24.000 MHz N/A
CyBUS_CLK CyMASTER_CLK 24.000 MHz 24.000 MHz 96.386 MHz
ADC_Del_theACLK CyMASTER_CLK 774.194 kHz 800.000 kHz N/A
ScanComp_1_Clock_int CyMASTER_CLK 160.000 kHz 160.000 kHz 53.611 MHz
Clock_1 CyMASTER_CLK 200.000  Hz 200.000  Hz 96.386 MHz
CyPLL_OUT CyPLL_OUT 24.000 MHz 24.000 MHz N/A
CyXTAL_32kHz CyXTAL_32kHz 32.768 kHz 32.768 kHz N/A
\ADC_Del:DSM\/dec_clock \ADC_Del:DSM\/dec_clock UNKNOWN UNKNOWN N/A
+ Register to Register Section
+ Setup Subsection
Path Delay Requirement : 5e+006ns(200  Hz)
Source Destination FMax Delay (ns) Slack (ns) Violation
\Debouncer_2:DEBOUNCER[0]:d_sync_0\/q \Debouncer_2:DEBOUNCER[0]:d_sync_1\/main_0 132.013 MHz 7.575 4999992.425
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell10 U(3,4) 1 \Debouncer_2:DEBOUNCER[0]:d_sync_0\ \Debouncer_2:DEBOUNCER[0]:d_sync_0\/clock_0 \Debouncer_2:DEBOUNCER[0]:d_sync_0\/q 1.250
Route 1 \Debouncer_2:DEBOUNCER[0]:d_sync_0\ \Debouncer_2:DEBOUNCER[0]:d_sync_0\/q \Debouncer_2:DEBOUNCER[0]:d_sync_1\/main_0 2.815
macrocell11 U(3,4) 1 \Debouncer_2:DEBOUNCER[0]:d_sync_1\ SETUP 3.510
Clock Skew 0.000
\Debouncer_2:DEBOUNCER[0]:d_sync_0\/q Net_9/main_0 132.433 MHz 7.551 4999992.449
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell10 U(3,4) 1 \Debouncer_2:DEBOUNCER[0]:d_sync_0\ \Debouncer_2:DEBOUNCER[0]:d_sync_0\/clock_0 \Debouncer_2:DEBOUNCER[0]:d_sync_0\/q 1.250
Route 1 \Debouncer_2:DEBOUNCER[0]:d_sync_0\ \Debouncer_2:DEBOUNCER[0]:d_sync_0\/q Net_9/main_0 2.791
macrocell9 U(3,4) 1 Net_9 SETUP 3.510
Clock Skew 0.000
\Debouncer_1:DEBOUNCER[0]:d_sync_0\/q \Debouncer_1:DEBOUNCER[0]:d_sync_1\/main_0 135.704 MHz 7.369 4999992.631
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell7 U(3,4) 1 \Debouncer_1:DEBOUNCER[0]:d_sync_0\ \Debouncer_1:DEBOUNCER[0]:d_sync_0\/clock_0 \Debouncer_1:DEBOUNCER[0]:d_sync_0\/q 1.250
Route 1 \Debouncer_1:DEBOUNCER[0]:d_sync_0\ \Debouncer_1:DEBOUNCER[0]:d_sync_0\/q \Debouncer_1:DEBOUNCER[0]:d_sync_1\/main_0 2.609
macrocell8 U(2,4) 1 \Debouncer_1:DEBOUNCER[0]:d_sync_1\ SETUP 3.510
Clock Skew 0.000
\Debouncer_1:DEBOUNCER[0]:d_sync_0\/q Net_2/main_0 135.759 MHz 7.366 4999992.634
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell7 U(3,4) 1 \Debouncer_1:DEBOUNCER[0]:d_sync_0\ \Debouncer_1:DEBOUNCER[0]:d_sync_0\/clock_0 \Debouncer_1:DEBOUNCER[0]:d_sync_0\/q 1.250
Route 1 \Debouncer_1:DEBOUNCER[0]:d_sync_0\ \Debouncer_1:DEBOUNCER[0]:d_sync_0\/q Net_2/main_0 2.606
macrocell6 U(3,4) 1 Net_2 SETUP 3.510
Clock Skew 0.000
\Debouncer_3:DEBOUNCER[0]:d_sync_0\/q Net_14/main_0 136.129 MHz 7.346 4999992.654
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell27 U(3,4) 1 \Debouncer_3:DEBOUNCER[0]:d_sync_0\ \Debouncer_3:DEBOUNCER[0]:d_sync_0\/clock_0 \Debouncer_3:DEBOUNCER[0]:d_sync_0\/q 1.250
Route 1 \Debouncer_3:DEBOUNCER[0]:d_sync_0\ \Debouncer_3:DEBOUNCER[0]:d_sync_0\/q Net_14/main_0 2.586
macrocell26 U(3,4) 1 Net_14 SETUP 3.510
Clock Skew 0.000
\Debouncer_3:DEBOUNCER[0]:d_sync_0\/q \Debouncer_3:DEBOUNCER[0]:d_sync_1\/main_0 136.147 MHz 7.345 4999992.655
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell27 U(3,4) 1 \Debouncer_3:DEBOUNCER[0]:d_sync_0\ \Debouncer_3:DEBOUNCER[0]:d_sync_0\/clock_0 \Debouncer_3:DEBOUNCER[0]:d_sync_0\/q 1.250
Route 1 \Debouncer_3:DEBOUNCER[0]:d_sync_0\ \Debouncer_3:DEBOUNCER[0]:d_sync_0\/q \Debouncer_3:DEBOUNCER[0]:d_sync_1\/main_0 2.585
macrocell28 U(3,4) 1 \Debouncer_3:DEBOUNCER[0]:d_sync_1\ SETUP 3.510
Clock Skew 0.000
\Debouncer_1:DEBOUNCER[0]:d_sync_1\/q Net_2/main_1 141.443 MHz 7.070 4999992.930
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell8 U(2,4) 1 \Debouncer_1:DEBOUNCER[0]:d_sync_1\ \Debouncer_1:DEBOUNCER[0]:d_sync_1\/clock_0 \Debouncer_1:DEBOUNCER[0]:d_sync_1\/q 1.250
Route 1 \Debouncer_1:DEBOUNCER[0]:d_sync_1\ \Debouncer_1:DEBOUNCER[0]:d_sync_1\/q Net_2/main_1 2.310
macrocell6 U(3,4) 1 Net_2 SETUP 3.510
Clock Skew 0.000
\Debouncer_3:DEBOUNCER[0]:d_sync_1\/q Net_14/main_1 141.663 MHz 7.059 4999992.941
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell28 U(3,4) 1 \Debouncer_3:DEBOUNCER[0]:d_sync_1\ \Debouncer_3:DEBOUNCER[0]:d_sync_1\/clock_0 \Debouncer_3:DEBOUNCER[0]:d_sync_1\/q 1.250
Route 1 \Debouncer_3:DEBOUNCER[0]:d_sync_1\ \Debouncer_3:DEBOUNCER[0]:d_sync_1\/q Net_14/main_1 2.299
macrocell26 U(3,4) 1 Net_14 SETUP 3.510
Clock Skew 0.000
\Debouncer_2:DEBOUNCER[0]:d_sync_1\/q Net_9/main_1 141.864 MHz 7.049 4999992.951
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell11 U(3,4) 1 \Debouncer_2:DEBOUNCER[0]:d_sync_1\ \Debouncer_2:DEBOUNCER[0]:d_sync_1\/clock_0 \Debouncer_2:DEBOUNCER[0]:d_sync_1\/q 1.250
Route 1 \Debouncer_2:DEBOUNCER[0]:d_sync_1\ \Debouncer_2:DEBOUNCER[0]:d_sync_1\/q Net_9/main_1 2.289
macrocell9 U(3,4) 1 Net_9 SETUP 3.510
Clock Skew 0.000
Path Delay Requirement : 41.6667ns(24 MHz)
Affects clock : CyMASTER_CLK
Source Destination FMax Delay (ns) Slack (ns) Violation
Pin_1_Button_Pin(0)/fb \Debouncer_1:DEBOUNCER[0]:d_sync_0\/main_0 96.386 MHz 10.375 31.292
Type Location Fanout Instance/Net Source Dest Delay (ns)
iocell1 P0[0] 1 Pin_1_Button_Pin(0) Pin_1_Button_Pin(0)/in_clock Pin_1_Button_Pin(0)/fb 2.183
Route 1 Net_1 Pin_1_Button_Pin(0)/fb \Debouncer_1:DEBOUNCER[0]:d_sync_0\/main_0 4.682
macrocell7 U(3,4) 1 \Debouncer_1:DEBOUNCER[0]:d_sync_0\ SETUP 3.510
Clock Skew 0.000
Pin_3_Button_Pin(0)/fb \Debouncer_3:DEBOUNCER[0]:d_sync_0\/main_0 96.590 MHz 10.353 31.314
Type Location Fanout Instance/Net Source Dest Delay (ns)
iocell3 P0[2] 1 Pin_3_Button_Pin(0) Pin_3_Button_Pin(0)/in_clock Pin_3_Button_Pin(0)/fb 2.155
Route 1 Net_4 Pin_3_Button_Pin(0)/fb \Debouncer_3:DEBOUNCER[0]:d_sync_0\/main_0 4.688
macrocell27 U(3,4) 1 \Debouncer_3:DEBOUNCER[0]:d_sync_0\ SETUP 3.510
Clock Skew 0.000
Pin_2_Button_Pin(0)/fb \Debouncer_2:DEBOUNCER[0]:d_sync_0\/main_0 97.838 MHz 10.221 31.446
Type Location Fanout Instance/Net Source Dest Delay (ns)
iocell2 P0[1] 1 Pin_2_Button_Pin(0) Pin_2_Button_Pin(0)/in_clock Pin_2_Button_Pin(0)/fb 2.030
Route 1 Net_3 Pin_2_Button_Pin(0)/fb \Debouncer_2:DEBOUNCER[0]:d_sync_0\/main_0 4.681
macrocell10 U(3,4) 1 \Debouncer_2:DEBOUNCER[0]:d_sync_0\ SETUP 3.510
Clock Skew 0.000
Path Delay Requirement : 6250ns(160 kHz)
Source Destination FMax Delay (ns) Slack (ns) Violation
\ScanComp_1:bScanComp:ChannelCounter\/count_0 \ScanComp_1:ScanCompAMuxSingle_Decoder_one_hot_0\/main_0 53.611 MHz 18.653 6231.347
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell_alt U(1,5) 1 \ScanComp_1:bScanComp:ChannelCounter\ \ScanComp_1:bScanComp:ChannelCounter\/clock \ScanComp_1:bScanComp:ChannelCounter\/count_0 1.940
Route 1 \ScanComp_1:ch_addr_0\ \ScanComp_1:bScanComp:ChannelCounter\/count_0 \ScanComp_1:ScanCompAMuxSingle_Decoder_is_active\/main_0 7.554
macrocell3 U(2,4) 1 \ScanComp_1:ScanCompAMuxSingle_Decoder_is_active\ \ScanComp_1:ScanCompAMuxSingle_Decoder_is_active\/main_0 \ScanComp_1:ScanCompAMuxSingle_Decoder_is_active\/q 3.350
Route 1 \ScanComp_1:ScanCompAMuxSingle_Decoder_is_active\ \ScanComp_1:ScanCompAMuxSingle_Decoder_is_active\/q \ScanComp_1:ScanCompAMuxSingle_Decoder_one_hot_0\/main_0 2.299
macrocell23 U(2,4) 1 \ScanComp_1:ScanCompAMuxSingle_Decoder_one_hot_0\ SETUP 3.510
Clock Skew 0.000
\ScanComp_1:bScanComp:ChannelCounter\/count_0 \ScanComp_1:ScanCompAMuxSingle_Decoder_one_hot_1\/main_0 53.611 MHz 18.653 6231.347
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell_alt U(1,5) 1 \ScanComp_1:bScanComp:ChannelCounter\ \ScanComp_1:bScanComp:ChannelCounter\/clock \ScanComp_1:bScanComp:ChannelCounter\/count_0 1.940
Route 1 \ScanComp_1:ch_addr_0\ \ScanComp_1:bScanComp:ChannelCounter\/count_0 \ScanComp_1:ScanCompAMuxSingle_Decoder_is_active\/main_0 7.554
macrocell3 U(2,4) 1 \ScanComp_1:ScanCompAMuxSingle_Decoder_is_active\ \ScanComp_1:ScanCompAMuxSingle_Decoder_is_active\/main_0 \ScanComp_1:ScanCompAMuxSingle_Decoder_is_active\/q 3.350
Route 1 \ScanComp_1:ScanCompAMuxSingle_Decoder_is_active\ \ScanComp_1:ScanCompAMuxSingle_Decoder_is_active\/q \ScanComp_1:ScanCompAMuxSingle_Decoder_one_hot_1\/main_0 2.299
macrocell24 U(2,4) 1 \ScanComp_1:ScanCompAMuxSingle_Decoder_one_hot_1\ SETUP 3.510
Clock Skew 0.000
\ScanComp_1:bScanComp:status_out0_0\/q \ScanComp_1:bScanComp:St0_IntReg0\/status_0 67.916 MHz 14.724 6235.276
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell20 U(1,5) 1 \ScanComp_1:bScanComp:status_out0_0\ \ScanComp_1:bScanComp:status_out0_0\/clock_0 \ScanComp_1:bScanComp:status_out0_0\/q 1.250
Route 1 \ScanComp_1:bScanComp:status_out0_0\ \ScanComp_1:bScanComp:status_out0_0\/q \ScanComp_1:bScanComp:status_int0_0\/main_0 2.922
macrocell2 U(1,5) 1 \ScanComp_1:bScanComp:status_int0_0\ \ScanComp_1:bScanComp:status_int0_0\/main_0 \ScanComp_1:bScanComp:status_int0_0\/q 3.350
Route 1 \ScanComp_1:bScanComp:status_int0_0\ \ScanComp_1:bScanComp:status_int0_0\/q \ScanComp_1:bScanComp:St0_IntReg0\/status_0 6.702
statusicell1 U(2,4) 1 \ScanComp_1:bScanComp:St0_IntReg0\ SETUP 0.500
Clock Skew 0.000
\ScanComp_1:bScanComp:delay_form\/q \ScanComp_1:bScanComp:ChannelCounter\/enable 70.651 MHz 14.154 6235.846
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell12 U(0,5) 1 \ScanComp_1:bScanComp:delay_form\ \ScanComp_1:bScanComp:delay_form\/clock_0 \ScanComp_1:bScanComp:delay_form\/q 1.250
Route 1 \ScanComp_1:bScanComp:delay_form\ \ScanComp_1:bScanComp:delay_form\/q \ScanComp_1:bScanComp:enable_int\/main_0 3.177
macrocell1 U(0,5) 1 \ScanComp_1:bScanComp:enable_int\ \ScanComp_1:bScanComp:enable_int\/main_0 \ScanComp_1:bScanComp:enable_int\/q 3.350
Route 1 \ScanComp_1:bScanComp:enable_int\ \ScanComp_1:bScanComp:enable_int\/q \ScanComp_1:bScanComp:ChannelCounter\/enable 2.317
count7cell_alt U(1,5) 1 \ScanComp_1:bScanComp:ChannelCounter\ SETUP 4.060
Clock Skew 0.000
\ScanComp_1:bScanComp:ch_out_reg_0\/q \ScanComp_1:bScanComp:St0_IntReg0\/status_0 70.872 MHz 14.110 6235.890
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell21 U(0,5) 1 \ScanComp_1:bScanComp:ch_out_reg_0\ \ScanComp_1:bScanComp:ch_out_reg_0\/clock_0 \ScanComp_1:bScanComp:ch_out_reg_0\/q 1.250
Route 1 \ScanComp_1:bScanComp:ch_out_reg_0\ \ScanComp_1:bScanComp:ch_out_reg_0\/q \ScanComp_1:bScanComp:status_int0_0\/main_1 2.308
macrocell2 U(1,5) 1 \ScanComp_1:bScanComp:status_int0_0\ \ScanComp_1:bScanComp:status_int0_0\/main_1 \ScanComp_1:bScanComp:status_int0_0\/q 3.350
Route 1 \ScanComp_1:bScanComp:status_int0_0\ \ScanComp_1:bScanComp:status_int0_0\/q \ScanComp_1:bScanComp:St0_IntReg0\/status_0 6.702
statusicell1 U(2,4) 1 \ScanComp_1:bScanComp:St0_IntReg0\ SETUP 0.500
Clock Skew 0.000
\ScanComp_1:bScanComp:det_reg\/q \ScanComp_1:bScanComp:ChannelCounter\/enable 72.129 MHz 13.864 6236.136
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell13 U(0,5) 1 \ScanComp_1:bScanComp:det_reg\ \ScanComp_1:bScanComp:det_reg\/clock_0 \ScanComp_1:bScanComp:det_reg\/q 1.250
Route 1 \ScanComp_1:bScanComp:det_reg\ \ScanComp_1:bScanComp:det_reg\/q \ScanComp_1:bScanComp:enable_int\/main_1 2.887
macrocell1 U(0,5) 1 \ScanComp_1:bScanComp:enable_int\ \ScanComp_1:bScanComp:enable_int\/main_1 \ScanComp_1:bScanComp:enable_int\/q 3.350
Route 1 \ScanComp_1:bScanComp:enable_int\ \ScanComp_1:bScanComp:enable_int\/q \ScanComp_1:bScanComp:ChannelCounter\/enable 2.317
count7cell_alt U(1,5) 1 \ScanComp_1:bScanComp:ChannelCounter\ SETUP 4.060
Clock Skew 0.000
\ScanComp_1:bScanComp:ChannelCounter\/count_0 \ScanComp_1:ScanCompAMuxSingle_Decoder_old_id_0\/main_0 76.805 MHz 13.020 6236.980
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell_alt U(1,5) 1 \ScanComp_1:bScanComp:ChannelCounter\ \ScanComp_1:bScanComp:ChannelCounter\/clock \ScanComp_1:bScanComp:ChannelCounter\/count_0 1.940
Route 1 \ScanComp_1:ch_addr_0\ \ScanComp_1:bScanComp:ChannelCounter\/count_0 \ScanComp_1:ScanCompAMuxSingle_Decoder_old_id_0\/main_0 7.570
macrocell22 U(2,4) 1 \ScanComp_1:ScanCompAMuxSingle_Decoder_old_id_0\ SETUP 3.510
Clock Skew 0.000
\ScanComp_1:ScanCompAMuxSingle_Decoder_old_id_0\/q \ScanComp_1:ScanCompAMuxSingle_Decoder_one_hot_0\/main_0 78.697 MHz 12.707 6237.293
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell22 U(2,4) 1 \ScanComp_1:ScanCompAMuxSingle_Decoder_old_id_0\ \ScanComp_1:ScanCompAMuxSingle_Decoder_old_id_0\/clock_0 \ScanComp_1:ScanCompAMuxSingle_Decoder_old_id_0\/q 1.250
Route 1 \ScanComp_1:ScanCompAMuxSingle_Decoder_old_id_0\ \ScanComp_1:ScanCompAMuxSingle_Decoder_old_id_0\/q \ScanComp_1:ScanCompAMuxSingle_Decoder_is_active\/main_1 2.298
macrocell3 U(2,4) 1 \ScanComp_1:ScanCompAMuxSingle_Decoder_is_active\ \ScanComp_1:ScanCompAMuxSingle_Decoder_is_active\/main_1 \ScanComp_1:ScanCompAMuxSingle_Decoder_is_active\/q 3.350
Route 1 \ScanComp_1:ScanCompAMuxSingle_Decoder_is_active\ \ScanComp_1:ScanCompAMuxSingle_Decoder_is_active\/q \ScanComp_1:ScanCompAMuxSingle_Decoder_one_hot_0\/main_0 2.299
macrocell23 U(2,4) 1 \ScanComp_1:ScanCompAMuxSingle_Decoder_one_hot_0\ SETUP 3.510
Clock Skew 0.000
\ScanComp_1:ScanCompAMuxSingle_Decoder_old_id_0\/q \ScanComp_1:ScanCompAMuxSingle_Decoder_one_hot_1\/main_0 78.697 MHz 12.707 6237.293
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell22 U(2,4) 1 \ScanComp_1:ScanCompAMuxSingle_Decoder_old_id_0\ \ScanComp_1:ScanCompAMuxSingle_Decoder_old_id_0\/clock_0 \ScanComp_1:ScanCompAMuxSingle_Decoder_old_id_0\/q 1.250
Route 1 \ScanComp_1:ScanCompAMuxSingle_Decoder_old_id_0\ \ScanComp_1:ScanCompAMuxSingle_Decoder_old_id_0\/q \ScanComp_1:ScanCompAMuxSingle_Decoder_is_active\/main_1 2.298
macrocell3 U(2,4) 1 \ScanComp_1:ScanCompAMuxSingle_Decoder_is_active\ \ScanComp_1:ScanCompAMuxSingle_Decoder_is_active\/main_1 \ScanComp_1:ScanCompAMuxSingle_Decoder_is_active\/q 3.350
Route 1 \ScanComp_1:ScanCompAMuxSingle_Decoder_is_active\ \ScanComp_1:ScanCompAMuxSingle_Decoder_is_active\/q \ScanComp_1:ScanCompAMuxSingle_Decoder_one_hot_1\/main_0 2.299
macrocell24 U(2,4) 1 \ScanComp_1:ScanCompAMuxSingle_Decoder_one_hot_1\ SETUP 3.510
Clock Skew 0.000
\ScanComp_1:bScanComp:CtrlCnt\/control_0 \ScanComp_1:bScanComp:St0_IntReg0\/clk_en 89.936 MHz 11.119 6238.881
Type Location Fanout Instance/Net Source Dest Delay (ns)
controlcell1 U(0,5) 1 \ScanComp_1:bScanComp:CtrlCnt\ \ScanComp_1:bScanComp:CtrlCnt\/clock \ScanComp_1:bScanComp:CtrlCnt\/control_0 1.210
Route 1 \ScanComp_1:bScanComp:ctrl_enable\ \ScanComp_1:bScanComp:CtrlCnt\/control_0 \ScanComp_1:bScanComp:St0_IntReg0\/clk_en 7.809
statusicell1 U(2,4) 1 \ScanComp_1:bScanComp:St0_IntReg0\ SETUP 2.100
Clock Skew 0.000
+ Hold Subsection
Source Destination Slack (ns) Violation
\Debouncer_2:DEBOUNCER[0]:d_sync_1\/q Net_9/main_1 3.539
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell11 U(3,4) 1 \Debouncer_2:DEBOUNCER[0]:d_sync_1\ \Debouncer_2:DEBOUNCER[0]:d_sync_1\/clock_0 \Debouncer_2:DEBOUNCER[0]:d_sync_1\/q 1.250
Route 1 \Debouncer_2:DEBOUNCER[0]:d_sync_1\ \Debouncer_2:DEBOUNCER[0]:d_sync_1\/q Net_9/main_1 2.289
macrocell9 U(3,4) 1 Net_9 HOLD 0.000
Clock Skew 0.000
\Debouncer_3:DEBOUNCER[0]:d_sync_1\/q Net_14/main_1 3.549
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell28 U(3,4) 1 \Debouncer_3:DEBOUNCER[0]:d_sync_1\ \Debouncer_3:DEBOUNCER[0]:d_sync_1\/clock_0 \Debouncer_3:DEBOUNCER[0]:d_sync_1\/q 1.250
Route 1 \Debouncer_3:DEBOUNCER[0]:d_sync_1\ \Debouncer_3:DEBOUNCER[0]:d_sync_1\/q Net_14/main_1 2.299
macrocell26 U(3,4) 1 Net_14 HOLD 0.000
Clock Skew 0.000
\Debouncer_1:DEBOUNCER[0]:d_sync_1\/q Net_2/main_1 3.560
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell8 U(2,4) 1 \Debouncer_1:DEBOUNCER[0]:d_sync_1\ \Debouncer_1:DEBOUNCER[0]:d_sync_1\/clock_0 \Debouncer_1:DEBOUNCER[0]:d_sync_1\/q 1.250
Route 1 \Debouncer_1:DEBOUNCER[0]:d_sync_1\ \Debouncer_1:DEBOUNCER[0]:d_sync_1\/q Net_2/main_1 2.310
macrocell6 U(3,4) 1 Net_2 HOLD 0.000
Clock Skew 0.000
\Debouncer_3:DEBOUNCER[0]:d_sync_0\/q \Debouncer_3:DEBOUNCER[0]:d_sync_1\/main_0 3.835
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell27 U(3,4) 1 \Debouncer_3:DEBOUNCER[0]:d_sync_0\ \Debouncer_3:DEBOUNCER[0]:d_sync_0\/clock_0 \Debouncer_3:DEBOUNCER[0]:d_sync_0\/q 1.250
Route 1 \Debouncer_3:DEBOUNCER[0]:d_sync_0\ \Debouncer_3:DEBOUNCER[0]:d_sync_0\/q \Debouncer_3:DEBOUNCER[0]:d_sync_1\/main_0 2.585
macrocell28 U(3,4) 1 \Debouncer_3:DEBOUNCER[0]:d_sync_1\ HOLD 0.000
Clock Skew 0.000
\Debouncer_3:DEBOUNCER[0]:d_sync_0\/q Net_14/main_0 3.836
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell27 U(3,4) 1 \Debouncer_3:DEBOUNCER[0]:d_sync_0\ \Debouncer_3:DEBOUNCER[0]:d_sync_0\/clock_0 \Debouncer_3:DEBOUNCER[0]:d_sync_0\/q 1.250
Route 1 \Debouncer_3:DEBOUNCER[0]:d_sync_0\ \Debouncer_3:DEBOUNCER[0]:d_sync_0\/q Net_14/main_0 2.586
macrocell26 U(3,4) 1 Net_14 HOLD 0.000
Clock Skew 0.000
\Debouncer_1:DEBOUNCER[0]:d_sync_0\/q Net_2/main_0 3.856
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell7 U(3,4) 1 \Debouncer_1:DEBOUNCER[0]:d_sync_0\ \Debouncer_1:DEBOUNCER[0]:d_sync_0\/clock_0 \Debouncer_1:DEBOUNCER[0]:d_sync_0\/q 1.250
Route 1 \Debouncer_1:DEBOUNCER[0]:d_sync_0\ \Debouncer_1:DEBOUNCER[0]:d_sync_0\/q Net_2/main_0 2.606
macrocell6 U(3,4) 1 Net_2 HOLD 0.000
Clock Skew 0.000
\Debouncer_1:DEBOUNCER[0]:d_sync_0\/q \Debouncer_1:DEBOUNCER[0]:d_sync_1\/main_0 3.859
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell7 U(3,4) 1 \Debouncer_1:DEBOUNCER[0]:d_sync_0\ \Debouncer_1:DEBOUNCER[0]:d_sync_0\/clock_0 \Debouncer_1:DEBOUNCER[0]:d_sync_0\/q 1.250
Route 1 \Debouncer_1:DEBOUNCER[0]:d_sync_0\ \Debouncer_1:DEBOUNCER[0]:d_sync_0\/q \Debouncer_1:DEBOUNCER[0]:d_sync_1\/main_0 2.609
macrocell8 U(2,4) 1 \Debouncer_1:DEBOUNCER[0]:d_sync_1\ HOLD 0.000
Clock Skew 0.000
\Debouncer_2:DEBOUNCER[0]:d_sync_0\/q Net_9/main_0 4.041
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell10 U(3,4) 1 \Debouncer_2:DEBOUNCER[0]:d_sync_0\ \Debouncer_2:DEBOUNCER[0]:d_sync_0\/clock_0 \Debouncer_2:DEBOUNCER[0]:d_sync_0\/q 1.250
Route 1 \Debouncer_2:DEBOUNCER[0]:d_sync_0\ \Debouncer_2:DEBOUNCER[0]:d_sync_0\/q Net_9/main_0 2.791
macrocell9 U(3,4) 1 Net_9 HOLD 0.000
Clock Skew 0.000
\Debouncer_2:DEBOUNCER[0]:d_sync_0\/q \Debouncer_2:DEBOUNCER[0]:d_sync_1\/main_0 4.065
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell10 U(3,4) 1 \Debouncer_2:DEBOUNCER[0]:d_sync_0\ \Debouncer_2:DEBOUNCER[0]:d_sync_0\/clock_0 \Debouncer_2:DEBOUNCER[0]:d_sync_0\/q 1.250
Route 1 \Debouncer_2:DEBOUNCER[0]:d_sync_0\ \Debouncer_2:DEBOUNCER[0]:d_sync_0\/q \Debouncer_2:DEBOUNCER[0]:d_sync_1\/main_0 2.815
macrocell11 U(3,4) 1 \Debouncer_2:DEBOUNCER[0]:d_sync_1\ HOLD 0.000
Clock Skew 0.000
Source Destination Slack (ns) Violation
Pin_2_Button_Pin(0)/fb \Debouncer_2:DEBOUNCER[0]:d_sync_0\/main_0 6.711
Type Location Fanout Instance/Net Source Dest Delay (ns)
iocell2 P0[1] 1 Pin_2_Button_Pin(0) Pin_2_Button_Pin(0)/in_clock Pin_2_Button_Pin(0)/fb 2.030
Route 1 Net_3 Pin_2_Button_Pin(0)/fb \Debouncer_2:DEBOUNCER[0]:d_sync_0\/main_0 4.681
macrocell10 U(3,4) 1 \Debouncer_2:DEBOUNCER[0]:d_sync_0\ HOLD 0.000
Clock Skew 0.000
Pin_3_Button_Pin(0)/fb \Debouncer_3:DEBOUNCER[0]:d_sync_0\/main_0 6.843
Type Location Fanout Instance/Net Source Dest Delay (ns)
iocell3 P0[2] 1 Pin_3_Button_Pin(0) Pin_3_Button_Pin(0)/in_clock Pin_3_Button_Pin(0)/fb 2.155
Route 1 Net_4 Pin_3_Button_Pin(0)/fb \Debouncer_3:DEBOUNCER[0]:d_sync_0\/main_0 4.688
macrocell27 U(3,4) 1 \Debouncer_3:DEBOUNCER[0]:d_sync_0\ HOLD 0.000
Clock Skew 0.000
Pin_1_Button_Pin(0)/fb \Debouncer_1:DEBOUNCER[0]:d_sync_0\/main_0 6.865
Type Location Fanout Instance/Net Source Dest Delay (ns)
iocell1 P0[0] 1 Pin_1_Button_Pin(0) Pin_1_Button_Pin(0)/in_clock Pin_1_Button_Pin(0)/fb 2.183
Route 1 Net_1 Pin_1_Button_Pin(0)/fb \Debouncer_1:DEBOUNCER[0]:d_sync_0\/main_0 4.682
macrocell7 U(3,4) 1 \Debouncer_1:DEBOUNCER[0]:d_sync_0\ HOLD 0.000
Clock Skew 0.000
Source Destination Slack (ns) Violation
\ScanComp_1:bScanComp:ChannelCounter\/tc \ScanComp_1:bScanComp:tc0\/main_0 2.985
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell_alt U(1,5) 1 \ScanComp_1:bScanComp:ChannelCounter\ \ScanComp_1:bScanComp:ChannelCounter\/clock \ScanComp_1:bScanComp:ChannelCounter\/tc 0.650
Route 1 \ScanComp_1:bScanComp:tc_o\ \ScanComp_1:bScanComp:ChannelCounter\/tc \ScanComp_1:bScanComp:tc0\/main_0 2.335
macrocell16 U(1,5) 1 \ScanComp_1:bScanComp:tc0\ HOLD 0.000
Clock Skew 0.000
\ScanComp_1:bScanComp:tc0\/q \ScanComp_1:bScanComp:tc1\/main_0 3.538
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell16 U(1,5) 1 \ScanComp_1:bScanComp:tc0\ \ScanComp_1:bScanComp:tc0\/clock_0 \ScanComp_1:bScanComp:tc0\/q 1.250
Route 1 \ScanComp_1:bScanComp:tc0\ \ScanComp_1:bScanComp:tc0\/q \ScanComp_1:bScanComp:tc1\/main_0 2.288
macrocell17 U(1,5) 1 \ScanComp_1:bScanComp:tc1\ HOLD 0.000
Clock Skew 0.000
\ScanComp_1:ScanCompAMuxSingle_Decoder_old_id_0\/q \ScanComp_1:ScanCompAMuxSingle_Decoder_one_hot_0\/main_1 3.538
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell22 U(2,4) 1 \ScanComp_1:ScanCompAMuxSingle_Decoder_old_id_0\ \ScanComp_1:ScanCompAMuxSingle_Decoder_old_id_0\/clock_0 \ScanComp_1:ScanCompAMuxSingle_Decoder_old_id_0\/q 1.250
Route 1 \ScanComp_1:ScanCompAMuxSingle_Decoder_old_id_0\ \ScanComp_1:ScanCompAMuxSingle_Decoder_old_id_0\/q \ScanComp_1:ScanCompAMuxSingle_Decoder_one_hot_0\/main_1 2.288
macrocell23 U(2,4) 1 \ScanComp_1:ScanCompAMuxSingle_Decoder_one_hot_0\ HOLD 0.000
Clock Skew 0.000
\ScanComp_1:ScanCompAMuxSingle_Decoder_old_id_0\/q \ScanComp_1:ScanCompAMuxSingle_Decoder_one_hot_1\/main_1 3.538
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell22 U(2,4) 1 \ScanComp_1:ScanCompAMuxSingle_Decoder_old_id_0\ \ScanComp_1:ScanCompAMuxSingle_Decoder_old_id_0\/clock_0 \ScanComp_1:ScanCompAMuxSingle_Decoder_old_id_0\/q 1.250
Route 1 \ScanComp_1:ScanCompAMuxSingle_Decoder_old_id_0\ \ScanComp_1:ScanCompAMuxSingle_Decoder_old_id_0\/q \ScanComp_1:ScanCompAMuxSingle_Decoder_one_hot_1\/main_1 2.288
macrocell24 U(2,4) 1 \ScanComp_1:ScanCompAMuxSingle_Decoder_one_hot_1\ HOLD 0.000
Clock Skew 0.000
\ScanComp_1:bScanComp:tc2\/q \ScanComp_1:bScanComp:tc3\/main_0 3.550
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell18 U(0,5) 1 \ScanComp_1:bScanComp:tc2\ \ScanComp_1:bScanComp:tc2\/clock_0 \ScanComp_1:bScanComp:tc2\/q 1.250
Route 1 \ScanComp_1:bScanComp:tc2\ \ScanComp_1:bScanComp:tc2\/q \ScanComp_1:bScanComp:tc3\/main_0 2.300
macrocell15 U(0,5) 1 \ScanComp_1:bScanComp:tc3\ HOLD 0.000
Clock Skew 0.000
\ScanComp_1:bScanComp:tc1\/q \ScanComp_1:bScanComp:tc2\/main_0 3.557
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell17 U(1,5) 1 \ScanComp_1:bScanComp:tc1\ \ScanComp_1:bScanComp:tc1\/clock_0 \ScanComp_1:bScanComp:tc1\/q 1.250
Route 1 \ScanComp_1:bScanComp:tc1\ \ScanComp_1:bScanComp:tc1\/q \ScanComp_1:bScanComp:tc2\/main_0 2.307
macrocell18 U(0,5) 1 \ScanComp_1:bScanComp:tc2\ HOLD 0.000
Clock Skew 0.000
\ScanComp_1:bScanComp:tc3\/q \ScanComp_1:bScanComp:eos_latch\/main_1 3.561
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell15 U(0,5) 1 \ScanComp_1:bScanComp:tc3\ \ScanComp_1:bScanComp:tc3\/clock_0 \ScanComp_1:bScanComp:tc3\/q 1.250
Route 1 \ScanComp_1:bScanComp:tc3\ \ScanComp_1:bScanComp:tc3\/q \ScanComp_1:bScanComp:eos_latch\/main_1 2.311
macrocell14 U(1,5) 1 \ScanComp_1:bScanComp:eos_latch\ HOLD 0.000
Clock Skew 0.000
\ScanComp_1:bScanComp:count_reg_0\/q \ScanComp_1:bScanComp:count_reg_0\/main_2 4.028
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell19 U(1,5) 1 \ScanComp_1:bScanComp:count_reg_0\ \ScanComp_1:bScanComp:count_reg_0\/clock_0 \ScanComp_1:bScanComp:count_reg_0\/q 1.250
macrocell19 U(1,5) 1 \ScanComp_1:bScanComp:count_reg_0\ \ScanComp_1:bScanComp:count_reg_0\/q \ScanComp_1:bScanComp:count_reg_0\/main_2 2.778
macrocell19 U(1,5) 1 \ScanComp_1:bScanComp:count_reg_0\ HOLD 0.000
Clock Skew 0.000
\ScanComp_1:bScanComp:count_reg_0\/q \ScanComp_1:bScanComp:status_out0_0\/main_3 4.051
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell19 U(1,5) 1 \ScanComp_1:bScanComp:count_reg_0\ \ScanComp_1:bScanComp:count_reg_0\/clock_0 \ScanComp_1:bScanComp:count_reg_0\/q 1.250
Route 1 \ScanComp_1:bScanComp:count_reg_0\ \ScanComp_1:bScanComp:count_reg_0\/q \ScanComp_1:bScanComp:status_out0_0\/main_3 2.801
macrocell20 U(1,5) 1 \ScanComp_1:bScanComp:status_out0_0\ HOLD 0.000
Clock Skew 0.000
\ScanComp_1:bScanComp:ChannelCounter\/count_0 \ScanComp_1:bScanComp:count_reg_0\/main_3 4.131
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell_alt U(1,5) 1 \ScanComp_1:bScanComp:ChannelCounter\ \ScanComp_1:bScanComp:ChannelCounter\/clock \ScanComp_1:bScanComp:ChannelCounter\/count_0 0.620
Route 1 \ScanComp_1:ch_addr_0\ \ScanComp_1:bScanComp:ChannelCounter\/count_0 \ScanComp_1:bScanComp:count_reg_0\/main_3 3.511
macrocell19 U(1,5) 1 \ScanComp_1:bScanComp:count_reg_0\ HOLD 0.000
Clock Skew 0.000
+ Asynchronous Constraints
+ Recovery
Path Delay Requirement : 6250ns(160 kHz)
Source Destination FMax Delay (ns) Slack (ns) Violation
\ScanComp_1:bScanComp:eos_latch\/q \ScanComp_1:bScanComp:St0_IntReg0\/reset 106.078 MHz 9.427 6240.573
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell14 U(1,5) 1 \ScanComp_1:bScanComp:eos_latch\ \ScanComp_1:bScanComp:eos_latch\/clock_0 \ScanComp_1:bScanComp:eos_latch\/q 1.250
Route 1 \ScanComp_1:bScanComp:eos_latch\ \ScanComp_1:bScanComp:eos_latch\/q \ScanComp_1:bScanComp:St0_IntReg0\/reset 8.177
statusicell1 U(2,4) 1 \ScanComp_1:bScanComp:St0_IntReg0\ RECOVERY -0.000
Clock Skew 0.000
+ Removal
Source Destination Slack (ns) Violation
\ScanComp_1:bScanComp:eos_latch\/q \ScanComp_1:bScanComp:St0_IntReg0\/reset 9.427
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell14 U(1,5) 1 \ScanComp_1:bScanComp:eos_latch\ \ScanComp_1:bScanComp:eos_latch\/clock_0 \ScanComp_1:bScanComp:eos_latch\/q 1.250
Route 1 \ScanComp_1:bScanComp:eos_latch\ \ScanComp_1:bScanComp:eos_latch\/q \ScanComp_1:bScanComp:St0_IntReg0\/reset 8.177
statusicell1 U(2,4) 1 \ScanComp_1:bScanComp:St0_IntReg0\ REMOVAL 0.000
Clock Skew 0.000