Sync Burst SRAM Deselect Sequence

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    Question: How do we deselect a Sync Burst SRAM?



    After starting a read/write operation, just disabling the chip selects and (/ADSP or /CE1) or /ADSC doesn't disable the chip. If the operation is /ADSP controlled, then turning off the /CE would deselect the chip. But if it is an /ADSC controlled operation, then /ADSC should be kept active for one more clock cycle with chip enables deselected.