The Echo clocks are a pair of clocks that are outputs from the QDR"-II SRAM. They are free running clocks and used to correctly latch-in the return data from the QDR"-II. This is made possible by creating a constant relationship between the echo clocks and the data coming out of the QDR"-II SRAM. These clocks are always valid (Free running) and their frequency matches that of the input clocks (C and /C, or K and /K in the case of single clock domain). These clocks are designated as CQ and /CQ. In addition, the echo clock outputs are timed precisely in relation to output data signals, and can be used as valid data indicators or used to trigger the input register of the receiving device.
The appnote AN4065 has information about use of CQ and /CQ clocks.