Trip Voltage and EEPROM Access of ISD-300A1

Question: What is the POR trip voltage and time to first EEPROM access for the ISD-300A1?

 

Answer:

Worst-case measurement for POR trip is 1.06V. The time between power stabilization and first EEPROM access is approximately 2ms. This time will vary slightly (+/-20us) from chip to chip.

Please note that the  ISD-300A1 is obsolete and the functional replacement is AT2LP.  All the related collaterals of AT2LP can be found in the link here