Termination guidelines for interfacing QDR II SRAMs with Virtex FPGAs

Question: Do you recommend any specific termination guidelines for interfacing QDR II SRAMs with Virtex FPGAs?

 

Answer:

 

 

For, Virtex5 and memory interface, we recommend the guidelines provided in the link below as  a useful reference :http://www.xilinx.com/support/documentation/ip_documentation/ug086.pdf

We recommend the termination guidelines specified on page 553 and Figure A-5

However the final value of termination resistors must be chosen depending on the layout designed.