Connecting the ADV/LD# Pin in Synchronous NoBL SRAMs to a Static Level - KBA83097

Version 2

    Version: *A


    Translation - Japanese: 同期NoBL SRAMのADV/LD#ピンの静的レベルとの接続について - KBA83097- Community Translated (JA)



    Can I connect the ADV/LD# pin in synchronous NoBL SRAMs to a static level? Should I toggle it during normal operation?



    Yes, you can connect the ADV/LD# pin to a static level. You do not have to toggle it during normal operation. When ADV/LD# is tied HIGH (and CEN is asserted LOW), the address automatically increments during a burst cycle. When ADV/LD# is tied LOW, you can load a new address into the device for each access.