Alternate pin for SPI slave clock pin in CY8C20xx6
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Answer:
When using SPIS UM in CY8C20xx6 ,by default P1.3 is selected as the slave clock pin. There is an alternate option to use P1.0 as the slave clock by setting the Bit 2, SPICLK_ON_P10 in the register IO_CFG1. We need to change the pin configuration in the pinout window of the designer. Two things need to be done here:
1) Set properties of P1.0:
Name: SPISSCLK (here, the UM is named as SPIS. If it's named as SPIS_1, the name should be set as SPIS_1SCLK)
Select: StdCPU
Drive: Open Drain Low
Interrupt: DisableInt
AnalogMuxBus: Normal
InitialValue: 1
2) Change back the properties of P1.3 to its default values:
Name: Port_1_3
Select: StdCPU
Drive: High Z Analog
Interrupt: DisableInt
AnalogMuxBus: Normal
InitialValue: 0
Make sure to set the bit SPICLK_ON_P10 in the register IO_CFG1 before calling SPI_Start() API:
IO_CFG1 |= 0x04;
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