PSoC® 6 BLE Hardware Design Considerations (Draft) Part 3



We are currently drafting a PSoC 6 BLE Application Note (AN) on hardware design considerations. Placed here is part 3 of the AN, covering PSoC 6 BLE hardware considerations for the analog system. Some analog features in PSoC 6 BLE are CapSense, that enables self and mutual capacitive-sensing for user interfaces, a 12-bit SAR ADC with a sampling rate up to 2Msps, and a 12-bit Continuous Time DAC (CTDAC) that provides a continuous time output without the need for an external sample and hold circuit. This draft explains recommended ports and output paths for PSoC 6 BLE analog features such as CapSense, the SAR ADC, and the Continuous Time DAC.


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