PSoC® 6 BLE Hardware Design Considerations (Draft) Part 1


We are currently drafting a PSoC 6 BLE Application Note (AN) on hardware design considerations. Placed here is part 1 of the AN, covering power considerations and design. PSoC 6 BLE can be powered by a single supply, ranging from 1.7 V to 3.6 V. and has separate power domains for the analog sub-system and the digital sub-system. A high-efficiency buck regulator has also been integrated for minimizing power consumption in the digital sub-system and for the BLE radio. This draft explains the different power domains, power pin connections, power ramp sequencing, setting device power in the PSoC Creator IDE, and also eFuse programming for the PSoC 6 BLE MCU.


Please feel free to read through and leave your feedback in the comments section. We appreciate the feedback!