USB-Serial: Hardware Design Schematic Checklist - KBA231249

Version 4

    Version: **

     

    Translation - Japanese: USB-シリアル:ハードウェア設計の回路図のチェックリスト - KBA231249 - Community Translated (JA)

     

    Question:
    What are the items that I need to verify while designing a schematic for successful operation of USB-Serial Bridge Controllers?

     

    Answer:
    Following is the list of critical items that you need to follow while designing a schematic design for USB-Serial Bridge Controllers.

     

    1. Are all power pins VCC (or VBUS) and VCCIO (or VDDD) powered to a proper voltage level in accordance with Table 1?

     

    Parameter

    Description

    Min

    (V)

    Typical

    (V)

    Max

    (V)

    USB-Serial Configuration Utility:

    USB Configuration Change Needed

    VBUS Voltage is 3.3 V

    VDDD Voltage is less than 2 V

    VBUS (or VCC)

    USB PHY voltage

    3.15

    3.30

    3.45

    Checked

    -

    4.35

    5.00

    5.25

    Unchecked

    -

    VDDD (or VCCIO)

    I/O and core voltage

    1.71

    1.80

    1.89

    -

    Checked

    2.0

    3.3

    5.5

    -

    Unchecked

     

     

    2. If 1.71 V £ VDDD/VCCIO £ 1.89 V, is VCCD shorted to VDDD/VCCIO?

    If VDDD/VCCIO > 2 V, is a 1-uF decoupling capacitor connected to the VCCD/VCCIO pin?

     

    3. Is ferrite bead L1 connected at the VBUS pin of the USB connector?

    Ferrite beads should be connected at the USB connector to isolate the noise from the USB Host. See the respective USB-Serial controller DVK/RDK schematics (CYUSBS232 RDK, CYUSBS234 DVK, CYUSBS236 DVK).

     

    4. Is a 0.1-uF decoupling capacitor connected to the VBUS/VCC pin of the USB-Serial device close to the IC?

     

    5. Are the decoupling capacitors, 0.1 uF and 4.7 uF, connected to the VCCIO/VDDD pin of the USB-Serial device close to the IC?

    This will remove the low and high frequency noise.

     

    6. USB-Serial Bridge Controllers have a built-in ESD protection of 2.2 kV. For protection over 2.2 kV, have you connected the ESD diodes to the VBUS/VCC, USBDP, and USBDM lines?

     

    7. Is the Reset (XRES) pin pulled high externally using a resistor?

    The USB-Serial devices support an Active Low external reset. The XRES pin should be held low for a minimum of 1 us to reset the USB-Serial controller.

    The nXRES pin can be tied to VDDD (or VCCIO) through an external resistor and to ground (GND) through an external capacitor (minimum 1-µs time constant), as shown in Figure 1. To meet the 1-µs pulse width requirement, the recommended values for R and C are 100 Ω and 0.01 µF, respectively.

     

    Figure 1. Example Reset Circuit for USB-Serial Bridge Controller

    GPIO:

    8. Are all input pins pulled high (or low) using a 10-kΩ pull-up (or pull-down) resistor?

     

    UART:

    9. Is the power supply of the other UART device (or line driver) to which the USB-Serial Bridge Controller is connected the same as or equal to VDDD (or VCCIO)?

     

    10. Are all UART lines of the USB-Serial Bridge Controller directly connected to the other UART device (or line driver) without the use of any external components?

     

    SPI (only for CY7C65211/211A/215/215A)

    11. Is the power supply of the other SPI device (master/slave) to which the USB-Serial Bridge Controller is connected the same as or equal to VDDD?

     

    12. Is a 10-kΩ pull-up resistor connected on the SSEL (slave select n) line?

     

    13. Are the MISO, MOSI, and SCLK lines connected directly to another SPI device?

     

    I2C (only for CY7C65211/211A/215/215A)

    14. Is the power supply of the other I2C device to which the USB-Serial Bridge Controller is connected the same as or equal to VDDD?

     

    15. Are the I2C lines pulled up to VDDD using external pull-up resistors?

    The recommended values for pull-up resistors on the SCL and SDA lines are 4.7 kΩ for the 100-kHz operating frequency and 2.2 kΩ for the 400-kHz operating frequency.

     

    JTAG (only for CY7C65211/211A/215/215A)

    16. Is the power supply of the other JTAG device (JTAG slave) to which the USB-Serial Bridge Controller is connected the same as or equal to VDDD?

     

    17. Are all JTAG lines of the USB-Serial Bridge Controller directly connected to the other JTAG slave device without the use of any external components?

     

    Table 2 lists the USB-Serial Bridge controller ICs and the details of the corresponding Reference Design Kit (RDK)/ Development Kit (DVK). For examples, see the Kit schematic of the respective USB-Serial Bridge Controllers.

     

    Note: The USB-Serial Bridge controller ICs (‘non-A’ parts): CY7C65211, CY7C65213, are CY7C65215 are pin-compatible with their corresponding ‘A’ parts: CY7C65211A, CY7C65213A, and CY7C65215A, and can be replaced in their respective DVK for development and testing purposes.

     

    Table 2. USB-Serial Bridge Controllers DVK/RDK

    USB-Serial Bridge Controller IC

    Kits

    DVK/RDK Schematic

    CY7C65211/211A

    CYUSBS234 DVK

    https://www.cypress.com/file/123356/download

    CY7C65213/213A

    CYUSBS232 RDK

    https://www.cypress.com/file/123296/download

    CY7C65215/215A

    CYUSBS236 DVK

    https://www.cypress.com/file/123486/download