Author: AH_96 Version: **
Translation - Japanese: PSoC 4 I2Cマスターは常にBUS_BUSYを報告します - KBA231435 - Community Translated (JA)
The SCB block in the I2C master configuration sets the busy flag on an I2C start condition and clears it on an I2C stop condition.
Any noise in the I2C bus, which could pull the SDA line to logic LOW (0.1VDD), triggers an erroneous Start condition. The hardware then assumes that the bus is busy forever and will not recover from this state. This error could also happen if a slave pulls the SCL line LOW during an active transfer before the complete byte is received from the master.
To recover from this indefinite SCB_I2C_MSTR_BUS_BUSY status, the I2C block must be reset by calling the SCB_STOP() and SCB_Start() functions when the status is continuously busy for some cycles.
The following code snippet shows this functionality where the master tries to write to the slave and normally returns I2CM_I2C_MSTR_NO_ERROR. However, when the error occurs continuously for NO_OF_ATTEMPTS times, the I2C block is reset:
/* Start I2C write and check status*/
if(I2CM_I2C_MSTR_NO_ERROR == I2CM_I2CMasterWriteBuf(I2C_SLAVE_ADDR,
busy_cnt = 0;
/* I2C write successful */
/* Error while sending I2C data */
/* Update the busy counter flag */
/* Check if there were continuous errors in I2C writes */
if(busy_cnt > NO_OF_ATTEMPTS)
busy_cnt = 0;
/* Reset the SCB block */
SCB component datasheet: https://www.cypress.com/documentation/component-datasheets/psoc-4-serial-communication-block-scb
I2C Bus specification: https://www.nxp.com/docs/en/user-guide/UM10204.pdf