Author: LinglingG_46 Version: **
Translation - Japanese: PSoC 4Sシリーズで追加のタイマーを使用する – KBA230963 - Community Translated (JA)
Question: How do I use the “Additional Timers” in PSoC® 4S series?
Answer: The watchdog timer (WDT) is used to automatically reset the device if there is an unexpected firmware execution path or a brownout that compromises the CPU functionality. The WDT runs from the LFCLK, generated by the ILO. The timer must be serviced periodically in firmware to avoid a reset. Otherwise, the timer will elapse and generate a device reset. The WDT can be used as an interrupt source or a wakeup source in low-power modes.
Besides WDT, there are three additional up-counting timers for general-purpose use – WDT0, WDT1, and WDT2. These three timers are clocked either from ILO or WCO, selected by writing into the WCO_WDT_CLKEN register. These timers can run in Active, Sleep, and Deep Sleep modes and can generate interrupts.
Figure 1. Default Configure System Clock
Examples
Configuring Timer0 as 1-Hz timer (Figure 2, by default, uses the ILO)
Solution 1:
Use the clock editor to configure, as shown in Figure 2.
Figure 2. Configure System Clock after Configuration
While building the project, the underlying code of the project will generate the clock configuration information in the static void ClockSetup(void) API in the cyfitter_cfg.c file”.
In the main.c file, you only need to call the callback function and enable the timer counter as shown in the following code snippet:
/ * Sets the ISR callback function for the particular DeepSleep Timer counter. */
CySysTimerSetInterruptCallback(CY_SYS_TIMER0, Timer0_1s_isr);
/*Enables the specified DeepSleep Timer counters. */
CySysTimerEnable(CY_SYS_TIMER0_MASK);
Then, the device will run in to the void Timer0_1s_isr(void) API every one second.
Solution 2:
Do not do any configuration in the clock editor, use the following code to configure the timer:
void Timer0_1s_isr(void)
{
// the user can place the application code here. When the interrupt generates, the code will jump here.
}
#define ENABLE_WDT_TIMER0_IN_CLICKEDITOR (0u)
#if(!ENABLE_WDT_TIMER0_IN_CLICKEDITOR)
/* set the timer source here, choose WCO or ILO */
CySysClkSetTimerSource(CY_SYS_CLK_TIMER_SRC_ILO);
/* set the timer mode, free running or interrupt, the interrupt generated on match for counter o and 1, and on bit toggle for counter2. */
CySysTimerSetMode(CY_SYS_TIMER0,CY_SYS_TIMER_MODE_INT);
/* use the match value to get the cycle*/
CySysTimerSetMatch(CY_SYS_TIMER0,0x9C3E);
/* enable bit: 0-counter free run; 1- couner clear on match */
CySysTimerSetClearOnMatch(CY_SYS_TIMER0,1);
#endif
/ * Sets the ISR callback function for the particular DeepSleep Timer counter. */
CySysTimerSetInterruptCallback(CY_SYS_TIMER0, Timer0_1s_isr);
/*Enables the specified DeepSleep Timer counters. */
CySysTimerEnable(CY_SYS_TIMER0_MASK);
For more details, see PSoC 4100S and PSoC 4100S Plus: PSoC 4 Architecture TRM.