Author: yongq_16 Version: **
Translation - Japanese: SPI Flashメモリの電源断タイミング要件と電源電圧降下からの復帰方法 - Community Translated (JA)
Question:
During tests with Cypress SPI Flash, we see Vcc drops. However, after Vcc comes back to the working range, the flash still does not function. Are there special requirements to recover flash after Vcc drops?
Answer:
Yes. As shown in Figure 1, if Vcc drops below Vcc (Min) and above Vcc (Cut-off), the flash device will function again once Vcc comes back to between Vcc (Min) and Vcc (Max).
However, if Vcc drops below Vcc (Cut-off), Vcc must be pulled below Vcc (LOW) for the duration of tPD, and the flash device must go through the Power On Reset process again (as shown in the second half of Figure 1). During this entire process, the flash Chip Select signal (CE#) cannot be LOW (No Device Access) until time of tPU after Vcc reaches Vcc (Min).
See the respective Cypress SPI flash family datasheet for detailed values of Vcc (Max), Vcc (Min), Vcc (Cut-off), Vcc (Low), tPD and tPU.
Figure 1
In addition, during fast power off/on test, Vcc may go down below Vcc (Cut-off) but not below Vcc (LOW) for at least tPD due to board circuit capacitance and the short interval between power off to the next power on. This may cause the flash device to not initialize correctly, leading to flash malfunction after power on. Enlarging the time interval between power off and the next power on for Vcc to have enough time to go down below Vcc (LOW) for at least tPD can avoid the incorrect initialization of the flash.