Selecting On-chip Regulator for PSoC 6 and Handling Unused Pins of SIMO Buck – KBA229115

Version 2

    Author: VasanthR_91            Version: **

     

    Translation - Japanese: PSoC 6 のオンチップレギュレータの選択とSIMO buck の未使用ピン処理について - KBA229115- Community Translated (JA)

    Question:
    How can I select the right regulator for a PSoC® 6 application? If I do not anticipate using low-power modes, do I need the Single Input Multiple Output (SIMO) buck? What should be done with the unused pins of SIMO?

     

    Answer: 
    The current load of your design decides the regulator to be used. For SIMO buck, the load must be up to 20 mA, whereas for a Low Drop-Out regulator (LDO), it can go up to 300 mA.

     

    Table 1:Core Voltage Regulators Max Load

     

    Output

    Max Load

    LP/Normal

    Max Clock Frequency

    LDO

    1. 0.9 V

    25/300 mA

    50 MHz for Cortex-M4 (CM4)

    25 MHz for Cortex-M0+ (CM0+)

    1. 1.1 V

    25/300 mA

    Allows maximum supported clock frequency

    Buck

    1. 0.9 V

    NA /20 mA

    50 MHz for CM4

    25 MHz for CM0+

    1. 1.1 V

    NA /20 mA

    Allows maximum supported clock frequency

     

    When used to power the core peripherals, the buck regulator provides better power efficiency than the LDO regulator, especially at higher VDDD. However, the buck regulator has less load current capability than the LDO regulator. Therefore, when using the buck regulator, take care not to overload the regulator by running only the necessary peripherals at a lower frequency in firmware.

     

    Unused pins: When a supply rail (input or output) is not used, it is recommended to leave the pin floating. For more information on how to design a hardware system around a PSoC 6 MCU device, refer to the PSoC 6 MCU Hardware Design Considerations document. This document covers different aspects of hardware design, starting with considerations for package selection, power, clocking, reset, I/O usage, programming and debugging interfaces, and analog module design.