Implementation of Program/Erase Suspend and Resume Operations in Serial NOR Flash – KBA229050

Version 3

    Author: ApurvaS_36           Version: **

     

    Translation - Japanese: シリアルNORフラッシュのプログラム/消去の一時停止と再開操作の実装 - KBA229050 - Community Translated (JA)

     

    In real-time applications, you may have a multi-threading environment, with the flash being used by several threads. Some threads will read, others will read/write. So, if a thread needs to read while the flash is busy erasing or programming, it will have to suspend the ongoing operation first before reading. The program/erase suspend operations are required in such multi-threaded operations where one of the threads reads data from the memory and a separate thread will be used to program or erase the flash.

    Program and erase operations to serial NOR flash devices can only be performed when the Write Enable Latch (WEL bit) of the Status Register is set to ‘1’. Program and erase commands are ignored by the device when this bit is reset to ‘0’. This is done to avoid any undesired changes to the flash memory. Write Enable (WREN) command (06h) execution sets the WEL bit to ‘1’ to allow program/erase operations. Therefore, WREN command is still required prior to program command while the flash is in erase-suspended mode. The S25FL512S part can be used as an example to understand the sequence of commands better.

     

    When a Program Suspend (PGSP) command (85h) is issued, the Program Suspend bit (SR2[0]) in Status Register 2 gets set. During program suspended mode, reading from a non-program-suspended-page is possible but erase operation is not possible. The WEL bit of Status Register 1 remains set while the device is in program suspended mode. Therefore, the WREN command is not required prior to  Program Resume (PGRS) command (8Ah).

     

    The sequence of commands that should be used to implement program suspension is as follows:

    • WREN (06h) command
      • Pull CS# LOW
      • Send WREN command
      • Pull CS# HIGH
    • PP(02h) command
      • Pull CS# LOW
      • Send PP command
      • Send Address
      • Send Data
      • Pull CS# HIGH
    • PGSP (85h) command
      • Pull CS# LOW
      • Send PGSP command
      • Pull CS# HIGH
    • Perform the desired read operation
    • PGRS (8Ah) command
      • Pull CS# LOW
      • Send PGRS command
      • Pull CS# HIGH
    • Poll the WIP bit of Status Register 1 to confirm program operation has completed without any errors.

     

    When an Erase Suspend (ERSP) command (75h) is issued, the Erase Suspend bit (SR2[1]) in Status Register 2 gets set. When the device is in erase suspended mode, reading from or programming data to other non-erase-suspended sectors is possible. When the ERSP command is received and decoded, the WEL bit is reset to ‘0’. A WREN command should be issued again prior to the program command. When a program operation is started and completed while an erase is suspended, the WEL bit is reset to ‘0’. However, the WREN command is not required again before resuming the erase operation with the Erase Resume (ERRS) command (7Ah). The WEL bit is set to ‘1’ upon the ERRS command.

     

    The sequence of commands that should be used to implement program operation while erase is suspended is as follows:

    • WREN (06h) command
      • Pull CS# LOW
      • Send WREN command
      • Pull CS# HIGH
    • SE(D8h) command
      • Pull CS# LOW
      • Send SE command
      • Send Address
      • Pull CS# HIGH
    • ERSP (75h) command
      • Pull CS# LOW
      • Send ERSP command
      • Pull CS# HIGH
    • WREN (06h) command
      • Pull CS# LOW
      • Send WREN command
      • Pull CS# HIGH
    • PP (02h) command
      • Pull CS# LOW
      • Send PP command
      • Send Address
      • Send Data
      • Pull CS# HIGH
    • Poll the WIP bit of Status Register 1 to confirm that the program operation has completed without any errors.
    • ERRS (7Ah) command
      • Pull CS# LOW
      • Send ERRS command
      • Pull CS# HIGH
    • Poll the WIP bit of Status Register 1 to confirm that the program operation has completed without any errors.