Author: VasanthR_91 Version: **
Translation - Japanese: PSoC 4 CSD ADC キャリブレーション API の必要性 - KBA228584 - Community Translated (JA)
In PSoC 4 devices, CSD ADCs are an option to measure an analog voltage in devices where SAR ADC is not available. The CSD Hardware ADC Component repurposes the CapSense® CSD hardware to perform voltage measurements. There are two versions of the CSD ADC Component available depending on the device being used.
In PSoC 4000 devices, the CSD hardware operates as a current sensing circuit. A 1-MΩ resistor placed in series with the input converts an input voltage signal into a small current, which is measured by the CSD hardware. The input voltage is calculated from this measured current and reported through an API.
In 4100s devices, the CapSense system implements a slope ADC to measure the input voltage. The ADC sequencer automatically samples the input voltage and performs the voltage measurement without CPU intervention. The input voltage (VIN) on any pin is sampled on to the internal CREF (CREF1 + CREF1) capacitors via AMUXBUSB. IDACB is used to ramp up/down the voltage on CREF capacitors from input voltage to VREF.
After each device reset, a simple open circuit calibration must be performed before any measurement is taken. This calibration requires starting the ADC, disconnecting all inputs using the analog mux, and making a single API function call. The open circuit calibration can be called again at any time to ensure that the result is as accurate as possible.
While using the CSD ADC for PSoC 4000 devices, call int32 CSD_ADC_CalibrateNoInput(void) calibrate the device. This API function performs the calibration to determine the value of the internal modulator current source. The calibration algorithm uses the known voltage across the 220K resistor connected to Cmod to measure a known current and calibrate the internal current source. Calibration is required only after a device reset. It is not required to calibrate again after waking up from Sleep or Deep Sleep but is recommended.
For PSoC 4100s devices, use cystatus ADC_Calibrate (void) to calibrate the device. This API function performs the calibration for the ADC to identify the appropriate hardware configuration to produce accurate results. It is recommended to run the calibration periodically (for example, every 10 seconds) for accuracy and compensation.
Figure 1: Measuring Mismatch between Isource and Isink (see section 188.8.131.52 in TRM)
Before measuring the input voltage, the ADC performs capacitor charging and discharging measurements cycle to determine the mismatch between souring IDAC (Isource) and sinking IDAC (Isink).
- Measures the time taken by the IDAC to charge CREF from VSSA to VREF. This time is called TgndToVref, as shown in Figure 1.
- Discharges CREF from VREF to VREF/2 (called as Thalf) and charges it back to VREF (called as Trecover) again.
When these measurements are completed, the ADC can measure the input voltage and apply proper compensation to get more accuracy.