Considerations for CapSense Sense Clock Parameters – KBA228329

Version 6

    Author: AH_96           Version: **


    Translation - Japanese: CapSenseセンスクロックパラメーターに関する考慮事項 – KBA228329 - Community Translated (JA)


    While developing any CapSense® application, it is important to set the correct parameters such as the sense clock frequency, resolution, and IDAC value noise threshold for optimum performance.


    1. Sense clock frequency

    The sense clock frequency determines the charge-discharge time of the CapSense sensor. This must be chosen such that the sensors charge and discharge completely. An example of incomplete charging of the sensor is shown in Figure 1. Figure 2 shows the complete charging and discharging of the sensor.

    The path to the sensor from the GPIO includes a series resistor that slows down the charging and discharging process of the sensor. The series resistor includes an internal resistance of 500 Ω and an external resistor (recommended value of 560 Ω).

    The maximum sense clock frequency is decided by the time constant of this combination.


    FSW (maximum) = 1 / 10*RSeriesTotal*CP


    Figure 1: Incomplete charging and discharging of sensor


    Figure 2: Complete charging and discharging of sensor


    The minimum value of the sense clock frequency is limited by the scan time and minimum sense clock frequency supported by that device. The hardware scan time is


    Scan Time = ((2N -1) / Modulator clock frequency), where N is the resolution of the widget


    The sense clock frequency must be set such that the period of the sense clock is lower than the scan time.

    For example, consider a mod clock frequency of 24 MHz and resolution of 6. This gives a scan time of 2.625 µs. Therefore, the sense clock frequency must be at least 381 kHz for the sensor to work.


    2. Sense clock source

    Sense clock source can be direct, PRS8, or PRS12; some devices support SSCx modes.

    Direct clock is a constant frequency source. When this is selected, the sensor switches with the constant frequency clock with the frequency specified by the component configuration window.

    Direct clock source has higher radiated noise and therefore, in systems where there are strict limitations on the noise emissions, it is recommended to use pseudo random sequencer (PRS) or spread spectrum clock (SSC) as the clock source. Setting the clock source to PRS or SSC will also reduce the number and width of flat spots.

    PRS spreads the clock using the pseudo random sequencer to provide lower radiated noise and improved immunity against external noise. PRS8 spreads the clock using PRS to Modulator clock / 256 and PRS 16 spreads the clock to Modulator clock / 4096.

    While setting the clock source to PRS, the following condition must be satisfied:

    At least one full PRS polynomial should finish during the scan time. That is,


      ( (2 N − 1) /  ModClk )  ≥  ((2 PRSN −1) /  SnsClk )


    Where N is the resolution of the widget, PRSN is the number of bits used for PRS (8 or 12), ModClk is the modulator clock frequency and SnsClk is the average Sense clock frequency.

    SSC provides a dithering clock with a center frequency equal to the frequency set in the “sense clock frequency” parameter. There are two conditions that need to be met for setting sense clock source as SSC.

    20% of the ratio between the Modulator clock frequency and Sense clock frequency should be greater or equal to the SSC frequency range = 32. That is


    160 ≤ (  ModClk  /  SnsClk )


    At least one full spread spectrum polynomial should complete during the scan time.


      ((2 N − 1) / ModClk )  ≥  ((2 SSCN −1) / SnsClk )


    Where N is the resolution of the widget, SSCN is the number of bits used for SSC (6,7,9 or 10), ModClk is the modulator clock frequency, and SnsClk is the average Sense clock frequency.

    For example, if the modulator clock Is 24 MHz and SSC6 is required to be configured, the maximum sense clock possible is 150 kHz.


    Since 160 ≤ (24000 /  SnsClk )


    The valid value of the sense clock is 93.75 kHz (HFCLK = 24 MHz). Therefore, the resolution that needs to be set to use SSC6 is 14.
    Since ((2 N − 1) / 24000)  ≥  ((2 6 − 1) /93.75)


    Similarly, if SSC7 must be used, the resolution that needs to be set is 15.


    Figure 3: Frequency spectrum with direct clock



    Figure 4: Frequency spectrum with PRS8



    Figure 5: Frequency spectrum with SSC7


    When the sense clock source is set to Auto, the algorithm chooses the source in the following order based on the criteria mentioned above:









    To detect the sense clock source, CapSense_GetParam(CapSense_BUTTON0_SNS_CLK_SOURCE_PARAM_ID, &val); API can be used after calling CapSense_Start().



    PSoC® 4 and PSoC 6 MCU CapSense® Design Guide

    PSoC 4 Capacitive Sensing (CapSense®)