How to Read Erase Complete Flash in HyperFlash - KBA228048

Version 5

    Author: MaxW_71          Version: **


    Translation - Japanese: HyperFlashの消去完了を読み取る方法 - KBA228048 - Community Translated (JA)


    Here is the command sequence to check whether the prior erase operation completed on a specific sector (datasheet: 001-99198 Rev. *M):




    Once the status word is read, check bit 0 for the result.



    Here are the Cypress Low Level Driver (LLD) APIs:






    Let’s take a closer look:


    1. The sector to check the status for is selected by the address argument to the Evaluate Erase Status command (D0h). Issuing this command causes the device to load the EES status for the selected sector.
    2. The Status Register Read command (70h) changes the array from displaying the stored data to displaying the status register (in all word locations) upon the subsequent read. That is, this command causes the device to enter the Status Register Read ASO.
    3. The second cycle of the Status Register Read command is a read from any flash address; this returns the status register value and causes the device to exit Status Register Read ASO. So, a new Status Register Read command must be issued every time you want to read the status register.

    This means that you can use the Status Register Read CMD API, which just performs Step 2. Then, your software can read any memory location to get the register value. Or, you can use the API that performs steps 2 and 3 for you (the Status Get API). Both ways give the same result.


    Note that Step 1 must be performed before the status read so that the proper status is loaded to the register; this command does not automatically enter the Status Register Read ASO.


    Note that the EES read is not a “zero time” operation – tEES is 70-100 µs – so the device will return “busy” status while the command executes. This operation takes time because it performs a special read of multiple hidden bits – for reliability, we store many bits with each sector to reflect the “erase complete” status – so the EES read is not nearly as fast as a normal array read.


    • Bit(7)=DRB=1 means the device is “ready”; this is the correct status after the EES command completes.
    • Bit(7)=DRB=0 means the device is “busy”; so the EES command needs some more time to finish.

    The bottomline is that you should either add a time delay until tEES expires, or poll on status register bit(7)=DRB until the device is ready. You can trust the ESTAT value once you see bit(7)=DRB=1.


    This means you should see one of the following:


    • 0b0000000x : EES command is in progress (bit(7)=DRB=0); ESTAT (bit(0)) is untrustworthy
    • 0x81 : EES command is done, and the sector is correctly erased
    • 0x80 : EES command is done, and the sector is incompletely erased