Author: TakashiM_61 Version: **
Translation - Japanese: タイトル：外部回路の出力インピーダンスのADCサンプリングタイムへの影響 - KBA226795 - Community Translated (JA)
The ADC Sampling time “ts” changes with the external impedance. You must ensure that the output impedance of the external circuit is fixed such that the following equation is satisfied, and meets A/D Converter Sampling time defined in the datasheet (for example S6E2H Series datasheet.)
Where RAIN is the input resistance of the ADC, CAIN is the input capacitance of the ADC, and REXT is the output impedance of the external circuit.
For example, here is the ADC sampling time for FM4 Family S6E2H Series MCU according to the table Electrical Characteristics for the A/D Converter in the datasheet.
Minimum Sampling time is 0.3 µs if AVCC ≥ 2.7 V , 1.2 µs if AVCC ≤ 2.7 V .
Maximum Sampling time is 10 µs.
References of other FM4 Family device datasheets: