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External Bus Interface in Traveo S6J3xxx MCUs - KBA226525

External Bus Interface in Traveo S6J3xxx MCUs - KBA226525

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Author: kotaroh_86           Version: **

Translation - Japanese: Traveo S6J3xxx MCUの外部バスインターフェース‐KBA226525- Community Translated (JA)

Question 1:

In Traveo™ S6J3xxx MCUs, how will the External Bus Interface (EBI) work if the software accesses EBI address out of the area configured by SRAM/FLASH Address Control Register (EBI_SFADDCR0 to 7)?

Answer:

If the software accesses EBI address out of the area configured by SRAM/FLASH Address Control Register, then SFER bit of EBI ERROR Register (EBI_ERRR) is set to "1", and data abort occurs because EBI returns an error response to the internal bus.

Question 2:

When will the External Bus Interface (EBI) capture the MRDY (Memory Ready) signal as a wait state while connecting with a low speed device?

Answer:

The wait state of the MRDY signal is captured during the following timings synchronized with MCLK:

  • When reading from the low speed device, MRDY signal is captured at the MCLK rising edge after the falling edge of MOEX (Read Enable) 
    Capture.JPG
  • When writing to the low speed device, MRDY signal is captured at the MCLK rising edge after the falling edge of MWEX (Write Enable). Capture.JPG

Note:

This KBA applies to the following series of Traveo MCUs:

  • S6J3120
  • S6J3300
  • S6J3360
  • S6J3370
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