Ensuring USB Signal Integrity on FX3™ when GPIFII Toggles at High Frequency – KBA203828

Version 2

    Version: *A

     

    Translation - Japanese: GPIFIIが高周波で切り替わるときにFX3™でUSB信号の整合性を確保 – KBA203828 - Community Translated (JA)

     

    Question:

    What are the ways to ensure USB signal integrity on FX3 when GPIF-II is toggling at a high frequency?

     

    Answer:

    FX3’s GPIFII interface toggling at a high frequency may introduce PHY and LINK errors into the USB PHY. These PHY/link errors may cause the device to reset from the Host frequently if the link error rate is above a threshold value.

     

    Using the FX3 SDK, you can find the number of errors by printing it to the UART terminal by using the following API,

     

    >> CYU3PUsbGetErrorCounts(uint16_t *phy_err_cnt, uint16_t *lnk_err_cnt)

                              

    The following steps can help in reducing these errors:

    1. Change Tx swing in the firmware by using  the CyU3PUsbSetTxSwing(uint32_t swing) API. See the FX3APIGuide.
    2. Use an external 19.2-MHz oscillator. The internal oscillator working on CVDDQ is more susceptible to noise induced from high-frequency GPIFII block when compared to an external oscillator.
    3. Isolate all the power supplies (VIO1, U3TXVDDQ, U3RXVDDQ, and CVDDQ) from each other with ferrite beads.
    4. Reduce the GPIFII swing by reducing the GPIFII operating voltage. The possibility of noise from the GPIFII domain causing errors on USB PHY greatly reduces if the GPIFII is operated in 1.8 V to 2.5 V range.