Author: KandlaguntaR_36 Version: **
1. What are the low power modes available in FX3, FX3S, CX3, and SD3 when these are operating in USB 3.0 mode?
FX3, FX3S, CX3, and SD3 support the following low power modes when these are operating in USB 3.0 mode
- Suspend mode with USB 3.0 PHY enabled (L1): The clock to the CPU is gated, and the CPU is placed in the wait for interrupt state. Firmware execution resumes from the next instruction, once the device wakes from L1 mode.
- Suspend mode with USB 3.0 PHY disabled (L2): This is same as the L1 mode except that the USB 3.0 PHY is disabled before entering the suspend mode. You must disable USB 3.0 PHY by calling theCyU3PSysEnterSuspendMode API.
- Standby mode (L3): The CPU is powered down while the program RAM content is retained. Firmware execution starts from the reset vector once the device wakes from the L3 mode.
- Core power-down mode (L4): Core power is turned off by removing power from the VDD pins. The contents of system SRAM are lost, and I/O pins retain their states, if suitably configured in the firmware. When power is reapplied to the VDD pins, FX3 performs the normal power-on reset (POR) sequence.
For more details on these modes, see Table 6 in the FX3 datasheet.
2. Do all four low power modes apply to USB 2.0 mode of operation of FX3, FX3S, CX3, and SD3?
When FX3, FX3S, CX3, and SD3 are operated in USB 2.0 mode, USB 3.0 PHY is always disabled. Hence, there is no difference between L1 and L2 modes. Effectivity, three low power modes (L2, L3, and L4) are supported in USB 2.0 mode.
3. What are low power modes available in FX2G2 and SD2?
FX2G2 and SD2 operate only in USB 2.0 mode. Therefore, there is no difference between L1 and L2 modes. Hence, three low power modes (L2, L3, and L4) are supported.
4. What are the wakeup sources available in suspend mode of FX3, FX3S, CX3, SD3, FX2G2, and SD2?
FX3, FX3S, SD3, FX2G2, and SD2 have five wakeup sources but CX3 has only four wakeup sources. The wakeup sources are:
UART CTS pin: If the low performance peripherals (LPP) mode in IO Matrix configuration is set to only UART mode (CY_U3P_IO_MATRIX_LPP_UART_ONLY), GPIO  acts as a wakeup source. If the LPP mode is set to LPP Default mode(CY_U3P_IO_MATRIX_LPP_DEFAULT), GPIO  acts as a wakeup source. In CX3, LPP mode must be set to Default mode. Hence, only GPIO  acts as a wakeup source.
- USB Bus activity – If the USB mode is set to USB 2.0, D+ and D- act as wakeup sources. In case of USB 3.0 mode, SSRX pins act as wakeup sources.
- VBUS – Assertion of VBUS acts as a wakeup source.
- USB 2.0 OTGID - Impedance change detected on the USB2 OTGID pin acts as a wakeup source.
- PIB CTL0 pin – The CTL0 pin is GPIO in FX3, FX3S, SD3, FX2G2, and SD2. This wakeup source is unavailable in CX3.
Note that the USB Bus activity and USB 2.0 OTGID do not act as wakeup sources when the CPU is set to standby mode. These act as wakeup sources only when the CPU is set to suspend mode.
5. Is there an example project provided in the FX3 SDK that illustrates how the FX3, FX3S, CX3, SD3, FX2G2, and SD2 device can be configured to place FX3 in low power standby or suspend state?
- Yes. LowPowerTest is an example project provided in the SDK, which is in
EZ-USB FX3 SDK\1.3\firmware\basic_examples\cyfxlowpowertest.
See the readme.txt file provided in the example project for more details.