Controlling UART Tx and Rx Pins through Firmware for PSoC 4 Devices - KBA 224950

Version 3

    Author: ShanmathiN_06           Version: **

     

    Translation - Japanese: PSoC 4 デバイスでファームウェアから UART の Tx と Rx ピンを制御する -  KBA224950 - Community Translated (JA)

     

    Question:

    How can the UART Rx and Tx pins in the firmware for PSoC® 4 devices be controlled during runtime?

     

    Answer:

    In this knowledge base article, you will learn to change the functionality of SCB_UART Tx and Rx pins dynamically in the firmware. The use cases list the reasons to control pins in firmware. The solution provides the steps to control pins in firmware. The code snippets implement the suggested solutions using APIs.

    Use cases for controlling UART Tx and Rx pins in firmware:

    1. UART Rx pin may be sensitive to electrical noise and hence, enabling an internal pull up resistor on Rx pin would resolve this noise sensitivity issue.
    2. While switching between half-duplex and full-duplex modes, Tx and Rx pins can be configured as GPIO and controlled in firmware when not used by SCB UART.

    Solution in firmware:

    In general, pins can be controlled by either firmware or hardware. By default, UART pins are controlled by the SCB hardware block; so, it is necessary to disconnect the UART pins from the SCB block to enable control in firmware.

    Follow these steps to disconnect the hardware connection between Tx/Rx pin and UART SCB and enable control in firmware:

    1. Write 'bit 0' to the bits of HSIOM_PORT_SELx register corresponding to Tx/Rx pin.
    2. Set the drive mode of the Tx/Rx pin using firmware.

    For more details, see the I/O System (HSIOM) in the Architecture Technical Reference Manual (TRM).

    You can use these code snippets to implement the steps to disconnect the hardware connection between Tx/Rx pin and UART SCB and enable control in firmware.

    Code snippet for use case 1: Control Rx pin in firmware

    For example, consider UART_Tx pin and UART_Rx pin to be P0.1 and P0.0, respectively.

     

    // Variable to store the default SCB_UART configuration settings

     

    uint32 temp;

     

    // Save the HSIOM configuration for SCB_UART

     

    temp = CY_GET_REG32 (CYREG_HSIOM_PORT_SEL0);

     

    // Configure UART_Rx pin to be controlled in firmware

     

    CY_SET_REG32 (CYREG_HSIOM_PORT_SEL0, CY_GET_REG32 (CYREG_HSIOM_PORT_SEL0) & 0xFFFFFFF0);

     

    // Set the drive mode of UART Rx pin

     

    UART_pin_SetDriveMode(UART_pin_DM_RES_UP);

     

    // Place your application code here

     

    // Load the default UART functionality (i.e) Rx pin is connected to SCB block

    CY_SET_REG32 (CYREG_HSIOM_PORT_SEL0, temp);

    Code snippet for use case 2: Switching between full-Duplex and half-Duplex modes

    For example, consider UART_Tx pin and UART_Rx pin to be P0.1 and P0.0, respectively.

     

    // Variable to store the default SCB_UART configuration settings

     

    uint32 temp;

     

    // Save the HSIOM duplex configuration for SCB_UART

     

    temp = CY_GET_REG32 (CYREG_HSIOM_PORT_SEL0);

     

    // UART Tx only mode

    // Configure UART_Rx pin to be controlled in firmware

     

    CY_SET_REG32 (CYREG_HSIOM_PORT_SEL0, CY_GET_REG32 (CYREG_HSIOM_PORT_SEL0) & 0xFFFFFFF0);

     

    // Set the drive mode of UART Rx pin

     

    UART_pin_SetDriveMode(UART_pin_DM_RES_UP);

     

    // Place your application code here for UART Tx only mode of operation

     

    // Load the default full duplex UART functionality (i.e) Rx pin is connected to SCB block

    CY_SET_REG32 (CYREG_HSIOM_PORT_SEL0, temp);

     

    // UART Rx only mode

    // Configure UART_Tx pin to be controlled in firmware

     

    CY_SET_REG32 (CYREG_HSIOM_PORT_SEL0, CY_GET_REG32 (CYREG_HSIOM_PORT_SEL0) & 0xFFFFFF0F);

     

    // Set the drive mode of UART Tx pin

     

    UART_pin_SetDriveMode(UART_pin_DM_RES_UP);

     

    // Place your application code here for UART Rx only mode of operation

     

    // Load the default full duplex UART functionality (i.e) Tx pin is connected to SCB block

    sCY_SET_REG32 (CYREG_HSIOM_PORT_SEL0, temp);