Utilization of Write Buffer when S29GL-T is Configured in x8 (byte) Mode - KBA224466

Version 10

    Author: AlbertB_56        Version: **

     

    Translation - Japanese: S29GL-Tがx8(バイト)モードで構成されている場合の書き込みバッファの利用 - KBA224466 - Community Translated (JA)

     

    Question:

    How is the entire capacity of the Write Buffer utilized on S29GL-T, configured in x8 (byte) mode, when migrating from the S29GL-P or S29GL-S?

     

    Answer:

    With Cypress’ Parallel NOR flash memory products, the capacity of the write buffer ranges from 32 bytes for the S29GL064N, to 512 bytes for the S29GL512T. However, for the S29GL-T device, while the size of the write buffer is independent of whether the parallel data lines are configured in x8 (BYTE) mode or in x16 (WORD) mode, the full 512B write buffer can only be written via one write buffer programming command in x16 mode; two write buffer programming commands are required to write 512B to the write buffer when in x8 mode.

     

    The reason for this is that the word count (WC) argument for the “write to buffer” command is one byte – so WC can count to 256 words in x16 mode (that is, the full 512B write buffer capacity), or 256 bytes in x8 mode (that is, only ½ of the 512B write buffer).

     

    Table 1.  Command Definitions x16

    Command Sequence

    Cycles

    Bus Cycles

    First

    Second

    Third

    Fourth

    Fifth

    Sixth

    Seventh

    Addr

    Data

    Addr

    Data

    Addr

    Data

    Addr

    Data

    Addr

    Data

    Addr

    Data

    Addr

    Data

    Read

    1

    RA

    RD

     

     

     

     

     

     

     

     

     

     

     

     

    Reset/ASO Exit

    1

    XXX

    F0

     

     

     

     

     

     

     

     

     

     

     

     

    Status Register Read

    2

    555

    70

    XXX

    RD

     

     

     

     

     

     

     

     

     

     

    Status Register Clear

    1

    555

    71

     

     

     

     

     

     

     

     

     

     

     

     

    Word Program

    4

    555

    AA

    2AA

    55

    555

    A0

    PA

    PD

     

     

     

     

     

     

    Write to Buffer

    6

    555

    AA

    2AA

    55

    SA

    25

    WC

    WBL

    PD

    WBL

    PD

     

     

     

    Program Buffer to Flash

    1

    SA

    29

     

     

     

     

     

     

     

     

     

     

     

     

     

    Thus, for x8 mode, two write buffer programming operations of 256B each must be used to program the full 512B write buffer: select the starting address align with write buffer offset 0 for the first buffer program operation, and; select the starting address to align with write buffer offset 256 for the second buffer program operation.

     

    • If you are migrating from an older device with smaller write buffers (S29GL-N has a 32B write buffer; S29GL-P has a 64B write buffer), then your existing programming command syntax will work without change if the migration maintains either x8 or x16 mode.
    • However, if you are migrating from the prior generation x16-only S29GL-S (≥ 128 Mb) with a 512B write buffer, then keeping the x16 configuration with S29GL-T also means no change to your existing programming command syntax.
    • When migrating from the x8/x16 S29GL064S with 256B write buffer to the S29GL-T, then no change to your existing programming command syntax is required if the migration maintains either x8 or x16 mode.

     

    Note that when reading the Common Flash Interface (CFI), as detailed in Table 2, the maximum number of bytes in multi-byte (in x8 BYTE mode) write is 256-bytes (0-255 bytes).  The maximum number of words in multi-word (in x16 WORD mode) write is 256-words (0-255 words).

     

    For more details, see the S29GL512T datasheet.

     

    Table 2.  CFI Device Geometry Definition

    Word Address

    Byte Address

    Data

    Description

    (SA) + 0027h

    (SA) + 004Eh

    001Bh (1 Gb)

    001Ah (512 Mb)

    Device Size = 2N byte;

    (SA) + 0028h

    (SA) + 0050h

    0002h

    Flash Device Interface Description 0 = x8-only, 1 = x16-only, 2 = x8/x16 capable

    (SA) + 0029h

    (SA) + 0052h

    0000h

    (SA) + 002Ah

    (SA) + 0054h

    0009h

    Max. number of byte in multi-byte write = 2N

    (00 = not supported)

    (SA) + 002Bh

    (SA) + 0056h

    0000h

    (SA) + 002Ch

    (SA) + 0058h

    0001h

    Number of Erase Block Regions within device

    1 = Uniform Device, 2 = Boot Device

    (SA) + 002Dh

    (SA) + 005Ah

    00XXh

    Erase Block Region 1 Information (refer to JEDEC JESD68-01 or JEP137 specifications)

    00FFh, 0003h, 0000h, 0002h =1 Gb

    00FFh, 0001h, 0000h, 0002h = 512 Mb

    (SA) + 002Eh

    (SA) + 005Ch

    000Xh

    (SA) + 002Fh

    (SA) + 005Eh

    0000h

    (SA) + 0030h

    (SA) + 0060h

    000Xh

    (SA) + 0031h

    (SA) + 0062h

    0000h

    Erase Block Region 2 Information (refer to CFI publication 100)

    (SA) + 0032h

    (SA) + 0064h

    0000h

    (SA) + 0033h

    (SA) + 0066h

    0000h

    (SA) + 0034h

    (SA) + 0068h

    0000h

    (SA) + 0035h

    (SA) + 006Ah

    0000h

    Erase Block Region 3 Information (refer to CFI publication 100)

    (SA) + 0036h

    (SA) + 006Ch

    0000h

    (SA) + 0037h

    (SA) + 006Eh

    0000h

    (SA) + 0038h

    (SA) + 0070h

    0000h

    (SA) + 0039h

    (SA) + 0072h

    0000h

    Erase Block Region 4 Information (refer to CFI publication 100)

    (SA) + 003Ah

    (SA) + 0074h

    0000h

    (SA) + 003Bh

    (SA) + 0076h

    0000h

    (SA) + 003Ch

    (SA) + 0078h

    0000h

    (SA) + 003Dh

    (SA) + 007Ah

    FFFFh

    Reserved

    (SA) + 003Eh

    (SA) + 007Ch

    FFFFh

    (SA) + 003Fh

    (SA) + 007Eh

    FFFFh