Retention of Backup RAM in Traveo™ S6J3110/3120 MCUs - KBA223672

Version 2

    Version: **


    Translation - Japanese: TraveoTM S6J3110/3120 MCUのバックアップRAMのリテンション - KBA223672 - Community Translated (JA)



    When I set the data to Backup RAM before the MCU transits to the Power Saving State (PSS) mode, the correct data is checked into the memory window of the debugger. But after the MCU returned from the PSS mode, the correct data which was set to Backup RAM is not available in the memory window. Why does this happen and what is the workaround?



    Change the attribute of the Backup RAM area to "Device" or “Strongly Order" when the data is written into Backup RAM. This is because the default attribute of that area is "Normal" and the data cannot be written in "Normal" attribute. The memory window on the debugger probably displayed the data from cache, if the cache is ON. If cache is disabled in PSS mode, that data is cleared from cache. Then, the memory window displays Backup RAM data directly from Backup RAM, but the previous writing operation failed due to the attribute setting. Hence, the memory window displays another data from the Backup RAM.